diff --git a/.gitignore b/.gitignore index f5557ce..21bef9f 100644 --- a/.gitignore +++ b/.gitignore @@ -2,6 +2,7 @@ Cargo.lock .*.sw? /target *.vim +junk/ perf.data perf.data.old diff --git a/src/cpus/m68k/assembler.rs b/src/cpus/m68k/assembler.rs index 9aa596f..11f9384 100644 --- a/src/cpus/m68k/assembler.rs +++ b/src/cpus/m68k/assembler.rs @@ -505,7 +505,7 @@ fn convert_indirect(lineno: usize, args: &[AssemblyOperand], disallow: Disallow) } } -fn convert_reg_and_other<'a>(lineno: usize, args: &'a [AssemblyOperand], disallow: Disallow) -> Result<(u16, u16, &'a AssemblyOperand), Error> { +fn convert_reg_and_other<'a>(lineno: usize, args: &'a [AssemblyOperand], _disallow: Disallow) -> Result<(u16, u16, &'a AssemblyOperand), Error> { match &args { &[AssemblyOperand::Register(reg), effective_address] => { Ok(((0b1 << 8), expect_reg_num(lineno, ®)?, effective_address)) @@ -600,6 +600,7 @@ fn encode_size_for_move(size: Size) -> u16 { } } +#[allow(dead_code)] fn encode_size_bit(size: Size) -> Result { match size { Size::Word => Ok(0b01 << 6), diff --git a/src/cpus/m68k/execute.rs b/src/cpus/m68k/execute.rs index 342506d..b755f6d 100644 --- a/src/cpus/m68k/execute.rs +++ b/src/cpus/m68k/execute.rs @@ -825,14 +825,14 @@ impl M68k { for i in 0..8 { if (mask & 0x01) != 0 { self.state.d_reg[i] = sign_extend_to_long(self.get_address_sized(addr as Address, size)?, size) as u32; - addr += size.in_bytes(); + (addr, _) = overflowing_add_sized(addr, size.in_bytes(), Size::Long); } mask >>= 1; } for i in 0..8 { if (mask & 0x01) != 0 { *self.get_a_reg_mut(i) = sign_extend_to_long(self.get_address_sized(addr as Address, size)?, size) as u32; - addr += size.in_bytes(); + (addr, _) = overflowing_add_sized(addr, size.in_bytes(), Size::Long); } mask >>= 1; } @@ -1058,7 +1058,7 @@ impl M68k { fn get_x_reg_value(&self, xreg: XRegister) -> u32 { match xreg { XRegister::DReg(reg) => self.state.d_reg[reg as usize], - XRegister::AReg(reg) => self.state.a_reg[reg as usize], + XRegister::AReg(reg) => self.get_a_reg(reg), } } @@ -1091,6 +1091,15 @@ impl M68k { if self.is_supervisor() { &mut self.state.ssp } else { &mut self.state.usp } } + #[inline(always)] + fn get_a_reg(&self, reg: Register) -> u32 { + if reg == 7 { + if self.is_supervisor() { self.state.ssp } else { self.state.usp } + } else { + self.state.a_reg[reg as usize] + } + } + #[inline(always)] fn get_a_reg_mut(&mut self, reg: Register) -> &mut u32 { if reg == 7 { diff --git a/src/cpus/m68k/tests.rs b/src/cpus/m68k/tests.rs index a33590f..7d2b106 100644 --- a/src/cpus/m68k/tests.rs +++ b/src/cpus/m68k/tests.rs @@ -162,6 +162,7 @@ mod decode_tests { } + /* #[test] pub fn run_assembler_opcode_tests() { let mut tests = 0; @@ -196,6 +197,7 @@ mod decode_tests { panic!("{} errors out of {} tests", errors, tests); } } + */ //use super::super::testcases::{TimingCase, TIMING_TESTS}; diff --git a/src/peripherals/genesis/controllers.rs b/src/peripherals/genesis/controllers.rs index 8ba067b..a079cd7 100644 --- a/src/peripherals/genesis/controllers.rs +++ b/src/peripherals/genesis/controllers.rs @@ -198,7 +198,7 @@ impl Addressable for GenesisControllers { } impl Steppable for GenesisControllers { - fn step(&mut self, system: &System) -> Result { + fn step(&mut self, _system: &System) -> Result { let duration = 100_000; // Update every 100us self.reset_timer += duration; diff --git a/src/peripherals/genesis/ym7101.rs b/src/peripherals/genesis/ym7101.rs index 908b87e..ade6f6c 100644 --- a/src/peripherals/genesis/ym7101.rs +++ b/src/peripherals/genesis/ym7101.rs @@ -1,6 +1,4 @@ -use std::iter::Iterator; - use crate::error::Error; use crate::system::System; use crate::memory::dump_slice; @@ -191,7 +189,7 @@ impl Ym7101Memory { Ok(()) } - pub fn write_data_port(&mut self, addr: Address, data: &[u8]) -> Result<(), Error> { + pub fn write_data_port(&mut self, data: &[u8]) -> Result<(), Error> { if (self.transfer_type & 0x30) == 0x20 { self.ctrl_port_buffer = None; self.transfer_fill_word = if data.len() >= 2 { read_beu16(data) } else { data[0] as u16 }; @@ -211,7 +209,7 @@ impl Ym7101Memory { Ok(()) } - pub fn write_control_port(&mut self, addr: Address, data: &[u8]) -> Result<(), Error> { + pub fn write_control_port(&mut self, data: &[u8]) -> Result<(), Error> { let value = read_beu16(data); match (data.len(), self.ctrl_port_buffer) { (2, None) => { self.ctrl_port_buffer = Some(value) }, @@ -814,7 +812,7 @@ impl Addressable for Ym7101 { fn write(&mut self, addr: Address, data: &[u8]) -> Result<(), Error> { match addr { // Write to Data Port - 0x00 | 0x02 => self.state.memory.write_data_port(addr, data)?, + 0x00 | 0x02 => self.state.memory.write_data_port(data)?, // Write to Control Port 0x04 | 0x06 => { @@ -831,7 +829,7 @@ impl Addressable for Ym7101 { self.set_register(value); } } else { - self.state.memory.write_control_port(addr, data)?; + self.state.memory.write_control_port(data)?; self.state.status = (self.state.status & !STATUS_DMA_BUSY) | (if self.state.memory.transfer_dma_busy { STATUS_DMA_BUSY } else { 0 }); } }, diff --git a/src/peripherals/sn76489.rs b/src/peripherals/sn76489.rs index 2696234..9957942 100644 --- a/src/peripherals/sn76489.rs +++ b/src/peripherals/sn76489.rs @@ -70,7 +70,7 @@ impl NoiseGenerator { info!("set attenuation to {} {}", self.attenuation, self.on); } - pub fn set_control(&mut self, bits: u8) { + pub fn set_control(&mut self, _bits: u8) { //let frequency = 3_579_545.0 / (count as f32 * 32.0); //self.wave.set_frequency(frequency); //debug!("set frequency to {}", frequency); diff --git a/src/peripherals/ym2612.rs b/src/peripherals/ym2612.rs index 2bf35ad..8e63a4c 100644 --- a/src/peripherals/ym2612.rs +++ b/src/peripherals/ym2612.rs @@ -48,7 +48,7 @@ impl Operator { self.wave.reset(); } - pub fn set_multiplier(&mut self, frequency: f32, multiplier: f32) { + pub fn set_multiplier(&mut self, _frequency: f32, multiplier: f32) { self.multiplier = multiplier; }