More clippy fixes after updating rustc

This commit is contained in:
transistor 2023-03-05 20:34:30 -08:00
parent 7bdd63bc76
commit 9be996d2a1
8 changed files with 23 additions and 29 deletions

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@ -153,9 +153,8 @@ impl System {
pub fn exit_error(&mut self) {
for (_, dev) in self.devices.iter() {
match dev.borrow_mut().as_steppable() {
Some(dev) => dev.on_error(self),
None => { },
if let Some(dev) = dev.borrow_mut().as_steppable() {
dev.on_error(self);
}
}
}

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@ -385,7 +385,7 @@ impl M68kAssembler {
[AssemblyOperand::Register(_), AssemblyOperand::Register(_)] => {
let bit_reg = expect_data_register(lineno, &args[0])?;
let reg = expect_data_register(lineno, &args[1])?;
self.output.push(opcode | ((bit_reg as u16) << 9) | direction | encode_size(operation_size) | (0b1 << 5) | reg);
self.output.push(opcode | (bit_reg << 9) | direction | encode_size(operation_size) | (0b1 << 5) | reg);
},
//[_] => {
// let (effective_address, additional_words) = convert_target(lineno, &args[0], Size::Word, Disallow::NoRegsImmediateOrPC)?;

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@ -129,7 +129,7 @@ impl M68kDecoder {
} else {
let size = get_size(ins);
let data = match size {
Some(Size::Byte) => (self.read_instruction_word(memory)? as u32 & 0xFF),
Some(Size::Byte) => self.read_instruction_word(memory)? as u32 & 0xFF,
Some(Size::Word) => self.read_instruction_word(memory)? as u32,
Some(Size::Long) => self.read_instruction_long(memory)?,
None => return Err(Error::processor(Exceptions::IllegalInstruction as u32)),

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@ -433,8 +433,8 @@ impl M68k {
//Instruction::BKPT(u8) => {
//},
Instruction::CHK(target, reg, size) => {
let upper_bound = sign_extend_to_long(self.get_target_value(target, size, Used::Once)?, size) as i32;
let dreg = sign_extend_to_long(self.state.d_reg[reg as usize], size) as i32;
let upper_bound = sign_extend_to_long(self.get_target_value(target, size, Used::Once)?, size);
let dreg = sign_extend_to_long(self.state.d_reg[reg as usize], size);
self.set_sr(self.state.sr & 0xFFF0);
if dreg < 0 || dreg > upper_bound {
@ -494,7 +494,7 @@ impl M68k {
let (remainder, quotient, overflow) = match sign {
Sign::Signed => {
let dest_val = dest_val as i32;
let src_val = sign_extend_to_long(src_val, Size::Word) as i32;
let src_val = sign_extend_to_long(src_val, Size::Word);
let quotient = dest_val / src_val;
(
(dest_val % src_val) as u32,
@ -514,7 +514,7 @@ impl M68k {
// Only update the register if the quotient was large than a 16-bit number
if !overflow {
self.set_compare_flags(quotient as u32, Size::Word, false, false);
self.set_compare_flags(quotient, Size::Word, false, false);
self.state.d_reg[dest as usize] = (remainder << 16) | (0xFFFF & quotient);
} else {
self.set_flag(Flags::Carry, false);
@ -617,7 +617,7 @@ impl M68k {
let value = *self.get_a_reg_mut(reg);
self.set_address_sized(sp as Address, value, Size::Long)?;
*self.get_a_reg_mut(reg) = sp;
*self.get_stack_pointer_mut() = (sp as i32).wrapping_add(offset as i32) as u32;
*self.get_stack_pointer_mut() = (sp as i32).wrapping_add(offset) as u32;
},
Instruction::LSd(count, target, size, shift_dir) => {
let count = self.get_target_value(count, size, Used::Once)? % 64;
@ -1540,7 +1540,7 @@ fn shift_operation(value: u32, size: Size, dir: ShiftDirection, arithmetic: bool
match size {
Size::Byte => (((value as u8) << 1) as u32, bit),
Size::Word => (((value as u16) << 1) as u32, bit),
Size::Long => ((value << 1) as u32, bit),
Size::Long => (value << 1, bit),
}
},
ShiftDirection::Right => {
@ -1558,7 +1558,7 @@ fn rotate_operation(value: u32, size: Size, dir: ShiftDirection, use_extend: Opt
match size {
Size::Byte => (mask | ((value as u8) << 1) as u32, bit),
Size::Word => (mask | ((value as u16) << 1) as u32, bit),
Size::Long => (mask | (value << 1) as u32, bit),
Size::Long => (mask | value << 1, bit),
}
},
ShiftDirection::Right => {

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@ -433,7 +433,7 @@ impl fmt::Display for Instruction {
Instruction::DBcc(cond, reg, offset) => write!(f, "db{}\t%d{}, {}", cond, reg, offset),
Instruction::DIVW(src, dest, sign) => write!(f, "div{}w\t{}, %d{}", sign, src, dest),
Instruction::DIVL(src, desth, destl, sign) => {
let opt_reg = desth.map(|reg| format!("%d{}:", reg)).unwrap_or_else(|| "".to_string());
let opt_reg = desth.map(|reg| format!("%d{}:", reg)).unwrap_or_default();
write!(f, "div{}l\t{}, {}%d{}", sign, src, opt_reg, destl)
},
@ -478,7 +478,7 @@ impl fmt::Display for Instruction {
},
Instruction::MULW(src, dest, sign) => write!(f, "mul{}w\t{}, %d{}", sign, src, dest),
Instruction::MULL(src, desth, destl, sign) => {
let opt_reg = desth.map(|reg| format!("%d{}:", reg)).unwrap_or_else(|| "".to_string());
let opt_reg = desth.map(|reg| format!("%d{}:", reg)).unwrap_or_default();
write!(f, "mul{}l\t{}, {}%d{}", sign, src, opt_reg, destl)
},

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@ -73,7 +73,7 @@ pub fn run_threaded<I>(matches: ArgMatches, init: I) where I: FnOnce(&mut MiniFr
{
let frontend = frontend.clone();
thread::spawn(move || {
let mut system = init(&mut *(frontend.lock().unwrap())).unwrap();
let mut system = init(&mut frontend.lock().unwrap()).unwrap();
frontend.lock().unwrap().finalize();
system.run_loop();
});

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@ -109,13 +109,10 @@ impl MC68681Port {
if self.rx_enabled && (self.status & SR_RX_READY) == 0 && self.tty.is_some() {
let tty = self.tty.as_mut().unwrap();
let result = tty.read();
match result {
Some(input) => {
self.input = input;
self.set_rx_status(true);
return Ok(true);
},
None => { },
if let Some(input) = result {
self.input = input;
self.set_rx_status(true);
return Ok(true);
}
}
Ok(false)
@ -316,9 +313,8 @@ impl Addressable for MC68681 {
self.set_interrupt_flag(ISR_CH_A_TX_READY, false);
},
REG_CRA_WR => {
match self.port_a.handle_command(data[0]) {
Some(value) => self.set_interrupt_flag(ISR_CH_A_TX_READY, value),
None => { },
if let Some(value) = self.port_a.handle_command(data[0]) {
self.set_interrupt_flag(ISR_CH_A_TX_READY, value);
}
},
REG_TBB_WR => {
@ -327,9 +323,8 @@ impl Addressable for MC68681 {
self.set_interrupt_flag(ISR_CH_B_TX_READY, false);
},
REG_CRB_WR => {
match self.port_b.handle_command(data[0]) {
Some(value) => self.set_interrupt_flag(ISR_CH_B_TX_READY, value),
None => { },
if let Some(value) = self.port_b.handle_command(data[0]) {
self.set_interrupt_flag(ISR_CH_B_TX_READY, value);
}
},
REG_CTUR_WR => {

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@ -431,7 +431,7 @@ impl Ym7101State {
#[inline(always)]
fn get_pattern_addr(&self, cell_table: usize, cell_x: usize, cell_y: usize) -> usize {
cell_table + ((cell_x + (cell_y * self.scroll_size.0 as usize)) << 1)
cell_table + ((cell_x + (cell_y * self.scroll_size.0)) << 1)
}
fn build_sprites_lists(&mut self) {