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Added some rustfmt::skip attributes

This commit is contained in:
transistor 2024-03-16 21:21:52 -07:00
parent 926ded02cf
commit a4368a48b2
14 changed files with 84 additions and 120 deletions
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6
.github/workflows/rustfmt.yaml vendored
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@ -23,9 +23,9 @@ jobs:
- name: Select rust version
run: |
rustup toolchain install 1.70 --profile minimal --no-self-update
rustup default 1.70
rustup toolchain install nightly --profile minimal --no-self-update
rustup default nightly
- name: Check rustfmt
run: |
cargo fmt --check
cargo +nightly fmt --check

9
.rustfmt.toml
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@ -3,10 +3,10 @@ edition = "2021"
max_width = 132
struct_lit_width = 0 # default 18 (24)
fn_call_width=132 # default 60 (80)
attr_fn_like_width=100 # default 70 (92)
fn_call_width=100 # default 60 (80)
array_width=132 # default 60 (80)
#chain_width=100 # default 60 (80)
#attr_fn_like_width=100 # default 70 (92)
#single_line_if_else_max_width=100 # default 50 (66)
#struct_variant_width = 0 # default 35 (46)
@ -19,6 +19,5 @@ unstable_features = true
blank_lines_upper_bound = 3
overflow_delimited_expr = true
# need a newline at the top and bottom of file
# need to be able to align const equals
# need to not erase whitespace between end of line and comment
# it would be nice to allow a newline at the top and bottom of file
# it would be nice to not erase the whitespace between the end of the code line and start of a comment on the same line

1
emulator/cpus/m68k/src/assembler.rs
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@ -24,6 +24,7 @@ impl From<ParserError> for Error {
#[repr(usize)]
#[derive(Copy, Clone)]
#[rustfmt::skip]
pub enum Disallow {
None = 0x0000,
NoDReg = 0x0001,

1
emulator/cpus/m68k/src/memory.rs
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@ -10,6 +10,7 @@ use crate::instructions::Size;
#[repr(u8)]
#[allow(dead_code)]
#[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[rustfmt::skip]
pub enum FunctionCode {
Reserved0 = 0,
UserData = 1,

2
emulator/cpus/m68k/src/state.rs
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@ -109,6 +109,7 @@ const FLAGS_ON_RESET: u16 = 0x2700;
#[repr(u16)]
#[allow(dead_code)]
#[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[rustfmt::skip]
pub enum Flags {
Carry = 0x0001,
Overflow = 0x0002,
@ -124,6 +125,7 @@ pub enum Flags {
#[repr(u8)]
#[allow(dead_code)]
#[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[rustfmt::skip]
pub enum Exceptions {
BusError = 2,
AddressError = 3,

1
emulator/cpus/z80/src/state.rs
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@ -28,6 +28,7 @@ pub enum Status {
#[repr(u8)]
#[allow(dead_code)]
#[derive(Copy, Clone, Debug, PartialEq, Eq)]
#[rustfmt::skip]
pub enum Flags {
Carry = 0x01,
AddSubtract = 0x02,

1
emulator/cpus/z80/tests/decode_tests.rs
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@ -55,6 +55,7 @@ fn run_all_decode_tests() {
}
}
#[rustfmt::skip]
const DECODE_TESTS: &'static [(&[u8], Instruction)] = &[
(&[0x00], Instruction::NOP),
(&[0x01, 0x01, 0x02], Instruction::LD(LoadTarget::DirectRegWord(RegisterPair::BC), LoadTarget::ImmediateWord(0x0201))),

1
emulator/cpus/z80/tests/execute_tests.rs
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@ -26,6 +26,7 @@ struct TestCase {
fini: TestState,
}
#[rustfmt::skip]
const TEST_CASES: &'static [TestCase] = &[
/*
TestCase {

70
emulator/peripherals/generic/src/ata.rs
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@ -4,23 +4,29 @@ use femtos::Instant;
use moa_core::{Error, Address, Addressable, Transmutable};
#[rustfmt::skip]
mod reg {
use super::Address;
pub(super) const DATA_WORD: Address = 0x20;
pub(super) const DATA_BYTE: Address = 0x21;
pub(super) const FEATURE: Address = 0x23;
pub(super) const ERROR: Address = 0x23;
pub(super) const SECTOR_COUNT: Address = 0x25;
pub(super) const SECTOR_NUM: Address = 0x27;
pub(super) const CYL_LOW: Address = 0x29;
pub(super) const CYL_HIGH: Address = 0x2B;
pub(super) const DRIVE_HEAD: Address = 0x2D;
pub(super) const STATUS: Address = 0x2F;
pub(super) const COMMAND: Address = 0x2F;
}
const ATA_REG_DATA_WORD: Address = 0x20;
const ATA_REG_DATA_BYTE: Address = 0x21;
const ATA_REG_FEATURE: Address = 0x23;
const ATA_REG_ERROR: Address = 0x23;
const ATA_REG_SECTOR_COUNT: Address = 0x25;
const ATA_REG_SECTOR_NUM: Address = 0x27;
const ATA_REG_CYL_LOW: Address = 0x29;
const ATA_REG_CYL_HIGH: Address = 0x2B;
const ATA_REG_DRIVE_HEAD: Address = 0x2D;
const ATA_REG_STATUS: Address = 0x2F;
const ATA_REG_COMMAND: Address = 0x2F;
const ATA_CMD_READ_SECTORS: u8 = 0x20;
const ATA_CMD_WRITE_SECTORS: u8 = 0x30;
const ATA_CMD_IDENTIFY: u8 = 0xEC;
const ATA_CMD_SET_FEATURE: u8 = 0xEF;
#[rustfmt::skip]
mod cmd {
pub(super) const READ_SECTORS: u8 = 0x20;
pub(super) const WRITE_SECTORS: u8 = 0x30;
pub(super) const IDENTIFY: u8 = 0xEC;
pub(super) const SET_FEATURE: u8 = 0xEF;
}
#[allow(dead_code)]
const ATA_ST_BUSY: u8 = 0x80;
@ -60,7 +66,7 @@ impl Addressable for AtaDevice {
fn read(&mut self, _clock: Instant, addr: Address, data: &mut [u8]) -> Result<(), Error> {
match addr {
ATA_REG_DATA_WORD => {
reg::DATA_WORD => {
self.selected_count -= 2;
let offset = ((self.selected_sector * ATA_SECTOR_SIZE) + (ATA_SECTOR_SIZE - 1 - self.selected_count)) as usize;
data[0] = self.contents[offset];
@ -70,7 +76,7 @@ impl Addressable for AtaDevice {
self.selected_count = 0;
}
},
ATA_REG_DATA_BYTE => {
reg::DATA_BYTE => {
self.selected_count -= 1;
let offset = ((self.selected_sector * ATA_SECTOR_SIZE) + (ATA_SECTOR_SIZE - 1 - self.selected_count)) as usize;
data[0] = self.contents[offset];
@ -79,10 +85,10 @@ impl Addressable for AtaDevice {
self.selected_count = 0;
}
},
ATA_REG_STATUS => {
reg::STATUS => {
data[0] = ATA_ST_DATA_READY;
},
ATA_REG_ERROR => {
reg::ERROR => {
data[0] = self.last_error;
},
_ => { log::debug!("{}: reading from {:0x}", DEV_NAME, addr); },
@ -94,24 +100,24 @@ impl Addressable for AtaDevice {
fn write(&mut self, _clock: Instant, addr: Address, data: &[u8]) -> Result<(), Error> {
log::debug!("{}: write to register {:x} with {:x}", DEV_NAME, addr, data[0]);
match addr {
ATA_REG_DRIVE_HEAD => { self.selected_sector |= ((data[0] & 0x1F) as u32) << 24; },
ATA_REG_CYL_HIGH => { self.selected_sector |= (data[0] as u32) << 16; },
ATA_REG_CYL_LOW => { self.selected_sector |= (data[0] as u32) << 8; },
ATA_REG_SECTOR_NUM => { self.selected_sector |= data[0] as u32; },
ATA_REG_SECTOR_COUNT => { self.selected_count = (data[0] as u32) * ATA_SECTOR_SIZE; },
ATA_REG_COMMAND => {
reg::DRIVE_HEAD => { self.selected_sector |= ((data[0] & 0x1F) as u32) << 24; },
reg::CYL_HIGH => { self.selected_sector |= (data[0] as u32) << 16; },
reg::CYL_LOW => { self.selected_sector |= (data[0] as u32) << 8; },
reg::SECTOR_NUM => { self.selected_sector |= data[0] as u32; },
reg::SECTOR_COUNT => { self.selected_count = (data[0] as u32) * ATA_SECTOR_SIZE; },
reg::COMMAND => {
match data[0] {
ATA_CMD_READ_SECTORS => { log::debug!("{}: reading sector {:x}", DEV_NAME, self.selected_sector); },
ATA_CMD_WRITE_SECTORS => { log::debug!("{}: writing sector {:x}", DEV_NAME, self.selected_sector); },
ATA_CMD_IDENTIFY => { },
ATA_CMD_SET_FEATURE => { },
cmd::READ_SECTORS => { log::debug!("{}: reading sector {:x}", DEV_NAME, self.selected_sector); },
cmd::WRITE_SECTORS => { log::debug!("{}: writing sector {:x}", DEV_NAME, self.selected_sector); },
cmd::IDENTIFY => { },
cmd::SET_FEATURE => { },
_ => { log::debug!("{}: unrecognized command {:x}", DEV_NAME, data[0]); },
}
},
ATA_REG_FEATURE => {
reg::FEATURE => {
// TODO implement features
},
ATA_REG_DATA_BYTE => {
reg::DATA_BYTE => {
// TODO implement writing
},
_ => { log::debug!("{}: writing {:0x} to {:0x}", DEV_NAME, data[0], addr); },

48
emulator/peripherals/mos/src/mos6522.rs
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@ -4,14 +4,18 @@ use femtos::{Instant, Duration};
use moa_core::{Error, System, Address, Addressable, Steppable, Transmutable};
use moa_signals::{Signal, ObservableSignal, Observable};
const REG_OUTPUT_B: Address = 0x00;
const REG_OUTPUT_A: Address = 0x01;
const REG_DDR_B: Address = 0x02;
const REG_DDR_A: Address = 0x03;
const REG_PERIPH_CTRL: Address = 0x0C;
const REG_INT_FLAGS: Address = 0x0D;
const REG_INT_ENABLE: Address = 0x0E;
const REG_OUTPUT_A_NHS: Address = 0x0F;
#[rustfmt::skip]
mod reg {
use super::Address;
pub(super) const OUTPUT_B: Address = 0x00;
pub(super) const OUTPUT_A: Address = 0x01;
pub(super) const DDR_B: Address = 0x02;
pub(super) const DDR_A: Address = 0x03;
pub(super) const PERIPH_CTRL: Address = 0x0C;
pub(super) const INT_FLAGS: Address = 0x0D;
pub(super) const INT_ENABLE: Address = 0x0E;
pub(super) const OUTPUT_A_NHS: Address = 0x0F;
}
const DEV_NAME: &str = "mos6522";
@ -61,12 +65,12 @@ impl Addressable for Mos6522 {
fn read(&mut self, _clock: Instant, addr: Address, data: &mut [u8]) -> Result<(), Error> {
match addr {
REG_OUTPUT_B => { data[0] = self.port_b.borrow_mut().data; },
REG_OUTPUT_A => { data[0] = self.port_a.borrow_mut().data; },
REG_DDR_B => { data[0] = self.port_b.borrow_mut().ddr; },
REG_DDR_A => { data[0] = self.port_a.borrow_mut().ddr; },
REG_INT_FLAGS => { data[0] = self.interrupt_flags; },
REG_INT_ENABLE => { data[0] = self.interrupt_enable | 0x80; },
reg::OUTPUT_B => { data[0] = self.port_b.borrow_mut().data; },
reg::OUTPUT_A => { data[0] = self.port_a.borrow_mut().data; },
reg::DDR_B => { data[0] = self.port_b.borrow_mut().ddr; },
reg::DDR_A => { data[0] = self.port_a.borrow_mut().ddr; },
reg::INT_FLAGS => { data[0] = self.interrupt_flags; },
reg::INT_ENABLE => { data[0] = self.interrupt_enable | 0x80; },
_ => {
log::warn!("{}: !!! unhandled read from {:0x}", DEV_NAME, addr);
},
@ -78,20 +82,20 @@ impl Addressable for Mos6522 {
fn write(&mut self, _clock: Instant, addr: Address, data: &[u8]) -> Result<(), Error> {
log::debug!("{}: write to register {:x} with {:x}", DEV_NAME, addr, data[0]);
match addr {
REG_OUTPUT_B => { self.port_b.borrow_mut().data = data[0]; self.port_b.notify(); },
REG_OUTPUT_A => { self.port_a.borrow_mut().data = data[0]; self.port_a.notify(); },
REG_DDR_B => { self.port_b.borrow_mut().ddr = data[0]; self.port_b.notify(); },
REG_DDR_A => { self.port_a.borrow_mut().ddr = data[0]; self.port_a.notify(); },
REG_PERIPH_CTRL => { println!("SET TO {:?}", data[0]); self.peripheral_ctrl = data[0]; },
REG_INT_FLAGS => { self.interrupt_flags &= !data[0] & 0x7F; },
REG_INT_ENABLE => {
reg::OUTPUT_B => { self.port_b.borrow_mut().data = data[0]; self.port_b.notify(); },
reg::OUTPUT_A => { self.port_a.borrow_mut().data = data[0]; self.port_a.notify(); },
reg::DDR_B => { self.port_b.borrow_mut().ddr = data[0]; self.port_b.notify(); },
reg::DDR_A => { self.port_a.borrow_mut().ddr = data[0]; self.port_a.notify(); },
reg::PERIPH_CTRL => { println!("SET TO {:?}", data[0]); self.peripheral_ctrl = data[0]; },
reg::INT_FLAGS => { self.interrupt_flags &= !data[0] & 0x7F; },
reg::INT_ENABLE => {
if (data[0] & 0x80) == 0 {
self.interrupt_flags &= !data[0];
} else {
self.interrupt_flags |= data[0];
}
},
REG_OUTPUT_A_NHS => { self.port_a.borrow_mut().data = data[0]; self.port_a.notify(); },
reg::OUTPUT_A_NHS => { self.port_a.borrow_mut().data = data[0]; self.port_a.notify(); },
_ => {
log::warn!("{}: !!! unhandled write {:0x} to {:0x}", DEV_NAME, data[0], addr);
},

21
emulator/peripherals/yamaha/src/ym2612.rs
View File

@ -28,6 +28,7 @@ use moa_host::{Host, HostError, Audio, Sample};
///
/// The value here is used to shift a bit to get the number of global cycles between each increment
/// of the envelope attenuation, based on the rate that's currently active
#[rustfmt::skip]
const COUNTER_SHIFT_VALUES: &[u16] = &[
11, 11, 11, 11,
10, 10, 10, 10,
@ -53,6 +54,7 @@ const COUNTER_SHIFT_VALUES: &[u16] = &[
/// than attenuation, and the values will always be below 64. This table maps each of the 64
/// possible angle values to a sequence of 8 cycles, and the amount to increment the attenuation
/// at each point in that cycle
#[rustfmt::skip]
const RATE_TABLE: &[u16] = &[
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
@ -120,6 +122,7 @@ const RATE_TABLE: &[u16] = &[
8, 8, 8, 8, 8, 8, 8, 8,
];
#[rustfmt::skip]
const DETUNE_TABLE: &[u8] = &[
0, 0, 1, 2,
0, 0, 1, 2,
@ -271,9 +274,6 @@ impl EnvelopeGenerator {
let rate = self.get_scaled_rate(self.envelope_state, rate_adjust);
let counter_shift = COUNTER_SHIFT_VALUES[rate];
//if self.debug_name == "ch 2, op 0" {
//println!("{:4x} {:4x} {:4x}", envelope_clock, counter_shift, envelope_clock % (1 << counter_shift));
//}
if envelope_clock % (1 << counter_shift) == 0 {
let update_cycle = (envelope_clock >> counter_shift) & 0x07;
let increment = RATE_TABLE[rate * 8 + update_cycle as usize];
@ -286,9 +286,6 @@ impl EnvelopeGenerator {
// to bitwise-and with 0xFFC instead, which will wrap the number to a 12-bit signed number, which when
// clamped to MAX_ENVELOPE will produce the same results
let new_envelope = self.envelope + (((!self.envelope * increment) as i16) >> 4) as u16;
//if self.debug_name == "ch 2, op 0" {
//println!("{:4x} {:4x} {:4x} {:4x} {:4x}", self.envelope, update_cycle, rate * 8 + update_cycle as usize, (((!self.envelope * increment) as i16) >> 4) as u16 & 0xFFFC, new_envelope);
//}
if new_envelope > self.envelope {
self.envelope_state = EnvelopeState::Decay;
self.envelope = 0;
@ -306,9 +303,6 @@ impl EnvelopeGenerator {
}
},
}
//if self.debug_name == "ch 2, op 0" {
//println!("{:4x} {:4x} {:4x} {:4x} {:4x}", rate, counter_shift, self.envelope_state as usize, increment, self.envelope);
//}
}
}
@ -440,6 +434,7 @@ impl PhaseGenerator {
///
/// K1 = F11
/// K0 = F11 & (F10 | F9 | F8) | !F11 & (F10 & F9 & F8)
#[rustfmt::skip]
const FNUMBER_TO_KEYCODE: &[u8] = &[
0, 0, 0, 0, 0, 0, 0, 1,
2, 3, 3, 3, 3, 3, 3, 3,
@ -519,10 +514,6 @@ impl Operator {
let mod_phase = phase + modulator;
//if self.debug_name == "ch 2, op 0" {
//println!("{:4x} = {:4x} + {:4x} + {:4x}, e: {:x}, {:4x} {:4x}", mod_phase, phase, self.phase.increment, modulator, self.envelope.envelope_state as usize, envelope, self.envelope.envelope);
//}
// The sine table contains the first half of the wave as an attenuation value
// Use the phase with the sign truncated to get the attenuation, plus the
// attenuation from the envelope, to get the total attenuation at this point
@ -617,10 +608,6 @@ impl Channel {
//let output = sign_extend_u16(output, 14);
//let output = output * 2 / 3;
//if self.debug_name == "ch 2" {
//println!("{:6x}", output);
//}
let sample = output as f32 / (1 << 13) as f32;
let left = if self.enabled.0 { sample } else { 0.0 };

18
emulator/systems/computie/src/system.rs
View File

@ -47,15 +47,6 @@ pub fn build_computie<H: Host>(host: &H, options: ComputieOptions) -> Result<Sys
let mut cpu = M68k::from_type(M68kType::MC68010, options.frequency);
//cpu.enable_tracing();
//cpu.add_breakpoint(0x10781a);
//cpu.add_breakpoint(0x10bc9c);
//cpu.add_breakpoint(0x106a94);
//cpu.add_breakpoint(0x1015b2);
//cpu.add_breakpoint(0x103332);
//cpu.decoder.dump_disassembly(&mut system, 0x100000, 0x2000);
//cpu.decoder.dump_disassembly(&mut system, 0x2ac, 0x200);
cpu.add_breakpoint(0);
system.add_interruptable_device("cpu", Device::new(cpu))?;
@ -85,15 +76,6 @@ pub fn build_computie_k30<H: Host>(host: &H) -> Result<System, Error> {
let cpu = M68k::from_type(M68kType::MC68030, Frequency::from_hz(10_000_000));
//cpu.enable_tracing();
//cpu.add_breakpoint(0x10781a);
//cpu.add_breakpoint(0x10bc9c);
//cpu.add_breakpoint(0x106a94);
//cpu.add_breakpoint(0x1015b2);
//cpu.add_breakpoint(0x103332);
//cpu.decoder.dump_disassembly(&mut system, 0x100000, 0x2000);
//cpu.decoder.dump_disassembly(&mut system, 0x2ac, 0x200);
system.add_interruptable_device("cpu", Device::new(cpu))?;
Ok(system)

2
emulator/systems/trs80/src/peripherals/mod.rs
View File

@ -1,5 +1,7 @@
pub mod model1;
#[rustfmt::skip]
pub mod keymap;
#[rustfmt::skip]
pub mod charset;

23
emulator/systems/trs80/src/system.rs
View File

@ -46,29 +46,6 @@ pub fn build_trs80<H: Host>(host: &mut H, options: Trs80Options) -> Result<Syste
// TODO the ioport needs to be hooked up
let cpu = Z80::from_type(Z80Type::Z80, options.frequency, system.bus.clone(), 0, None);
//cpu.add_breakpoint(0x0);
//cpu.add_breakpoint(0xb55);
//cpu.add_breakpoint(0xb76);
//cpu.add_breakpoint(0x1e5);
//cpu.add_breakpoint(0x340); // "exec", the function that executes the line typed in
//cpu.add_breakpoint(0x357);
//cpu.add_breakpoint(0x401); // LIST command exec
//cpu.add_breakpoint(0x10); // putchar
//cpu.add_breakpoint(0x970);
//cpu.add_breakpoint(0x9f9);
//cpu.add_breakpoint(0xa58); // return from printing the line number
//cpu.add_breakpoint(0xc59); // the function called first thing when printing a decimal number
//cpu.add_breakpoint(0xe00); // normalize the float??
//cpu.add_breakpoint(0x970); // just after the decimal number print function is called, but after the call at the start is complete
//cpu.add_breakpoint(0xa6c);
//cpu.add_breakpoint(0xe00);
//cpu.add_breakpoint(0xc77);
//cpu.add_breakpoint(0xc83);
//cpu.add_breakpoint(0x96d);
//cpu.add_breakpoint(0x970);
//cpu.add_breakpoint(0x9e2);
//cpu.add_breakpoint(0x9f9);
system.add_interruptable_device("cpu", Device::new(cpu))?;