From c97b3b8aca39518b1a88a19ba236ac19c1717b25 Mon Sep 17 00:00:00 2001 From: transistor Date: Sat, 13 May 2023 11:55:13 -0700 Subject: [PATCH] Fixed half carry in Z80 --- emulator/cpus/z80/src/execute.rs | 49 +- tests/rad_tests/latest.txt | 8 +- ...thout-undocumented-but-with-half-carry.txt | 659 ++++++++++++++++++ ...3-without-undocumented-instr-and-flags.txt | 659 ++++++++++++++++++ tests/rad_tests/src/main.rs | 19 +- 5 files changed, 1357 insertions(+), 37 deletions(-) create mode 100644 tests/rad_tests/progress/2023-05-13-without-undocumented-but-with-half-carry.txt create mode 100644 tests/rad_tests/progress/2023-05-13-without-undocumented-instr-and-flags.txt diff --git a/emulator/cpus/z80/src/execute.rs b/emulator/cpus/z80/src/execute.rs index 462b368..7884e98 100644 --- a/emulator/cpus/z80/src/execute.rs +++ b/emulator/cpus/z80/src/execute.rs @@ -173,8 +173,8 @@ impl Z80 { let src = self.get_target_value(target)?; let acc = self.get_register_value(Register::A); - let (result, carry, overflow) = sub_bytes(acc, src); - self.set_arithmetic_op_flags(result as u16, Size::Byte, true, carry, overflow, (result & 0x10) != 0); + let (result, carry, overflow, half_carry) = sub_bytes(acc, src); + self.set_arithmetic_op_flags(result as u16, Size::Byte, true, carry, overflow, half_carry); }, //Instruction::CPD => { //}, @@ -195,16 +195,16 @@ impl Z80 { Instruction::DEC16(regpair) => { let value = self.get_register_pair_value(regpair); - let (result, _, _) = sub_words(value, 1); + let (result, _, _, _) = sub_words(value, 1); self.set_register_pair_value(regpair, result); }, Instruction::DEC8(target) => { let value = self.get_target_value(target)?; - let (result, _, overflow) = sub_bytes(value, 1); + let (result, _, overflow, half_carry) = sub_bytes(value, 1); let carry = self.get_flag(Flags::Carry); // Preserve the carry bit, according to Z80 reference - self.set_arithmetic_op_flags(result as u16, Size::Byte, true, carry, overflow, (result & 0x10) != 0); + self.set_arithmetic_op_flags(result as u16, Size::Byte, true, carry, overflow, half_carry); self.set_target_value(target, result)?; }, @@ -266,9 +266,9 @@ impl Z80 { Instruction::INC8(target) => { let value = self.get_target_value(target)?; - let (result, _, overflow, _) = add_bytes(value, 1); + let (result, _, overflow, half_carry) = add_bytes(value, 1); let carry = self.get_flag(Flags::Carry); // Preserve the carry bit, according to Z80 reference - self.set_arithmetic_op_flags(result as u16, Size::Byte, false, carry, overflow, (result & 0x10) != 0); + self.set_arithmetic_op_flags(result as u16, Size::Byte, false, carry, overflow, half_carry); self.set_target_value(target, result)?; }, @@ -347,8 +347,8 @@ impl Z80 { Instruction::NEG => { let acc = self.get_register_value(Register::A); - let (result, carry, overflow) = sub_bytes(0, acc); - self.set_arithmetic_op_flags(result as u16, Size::Byte, true, carry, overflow, (acc & 0x10) != 0 && (result & 0x10) == 0); + let (result, carry, overflow, half_carry) = sub_bytes(0, acc); + self.set_arithmetic_op_flags(result as u16, Size::Byte, true, carry, overflow, half_carry); self.set_register_value(Register::A, result); }, @@ -484,9 +484,9 @@ impl Z80 { let src = self.get_target_value(target)?; let acc = self.get_register_value(Register::A); - let (result1, carry1, overflow1) = sub_bytes(acc, src); - let (result2, carry2, overflow2) = sub_bytes(result1, self.get_flag(Flags::Carry) as u8); - self.set_arithmetic_op_flags(result2 as u16, Size::Byte, true, carry1 | carry2, overflow1 ^ overflow2, (result2 & 0x10) != 0); + let (result1, carry1, overflow1, half_carry1) = sub_bytes(acc, src); + let (result2, carry2, overflow2, half_carry2) = sub_bytes(result1, self.get_flag(Flags::Carry) as u8); + self.set_arithmetic_op_flags(result2 as u16, Size::Byte, true, carry1 | carry2, overflow1 ^ overflow2, half_carry1 | half_carry2); self.set_register_value(Register::A, result2); }, @@ -494,9 +494,9 @@ impl Z80 { let src = self.get_register_pair_value(src_pair); let dest = self.get_register_pair_value(dest_pair); - let (result1, carry1, overflow1) = sub_words(dest, self.get_flag(Flags::Carry) as u16); - let (result2, carry2, overflow2) = sub_words(result1, src); - self.set_arithmetic_op_flags(result2, Size::Word, true, carry1 | carry2, overflow1 ^ overflow2, (result2 & 0x10) != 0); + let (result1, carry1, overflow1, half_carry1) = sub_words(dest, self.get_flag(Flags::Carry) as u16); + let (result2, carry2, overflow2, half_carry2) = sub_words(result1, src); + self.set_arithmetic_op_flags(result2, Size::Word, true, carry1 | carry2, overflow1 ^ overflow2, half_carry1 | half_carry2); self.set_register_pair_value(dest_pair, result2); }, @@ -558,8 +558,8 @@ impl Z80 { let src = self.get_target_value(target)?; let acc = self.get_register_value(Register::A); - let (result, carry, overflow) = sub_bytes(acc, src); - self.set_arithmetic_op_flags(result as u16, Size::Byte, true, carry, overflow, (result & 0x10) != 0); + let (result, carry, overflow, half_carry) = sub_bytes(acc, src); + self.set_arithmetic_op_flags(result as u16, Size::Byte, true, carry, overflow, half_carry); self.set_register_value(Register::A, result); }, @@ -859,28 +859,29 @@ impl Z80 { fn add_bytes(operand1: u8, operand2: u8) -> (u8, bool, bool, bool) { let (result, carry) = operand1.overflowing_add(operand2); let overflow = (operand1 & 0x80) == (operand2 & 0x80) && (operand1 & 0x80) != (result & 0x80); - let half_carry = (operand1 & 0x10) != 0 && (result & 0x10) == 0; + let half_carry = (operand1 & 0x0F) + (operand2 & 0x0F) >= 0x10; (result, carry, overflow, half_carry) } fn add_words(operand1: u16, operand2: u16) -> (u16, bool, bool, bool) { let (result, carry) = operand1.overflowing_add(operand2); let overflow = (operand1 & 0x8000) == (operand2 & 0x8000) && (operand1 & 0x8000) != (result & 0x8000); - // TODO this is probably still wrong - let half_carry = (operand1 & 0x10) != 0 && (result & 0x10) == 0; + let half_carry = (operand1 & 0x0FFF) + (operand2 & 0x0FFF) >= 0x1000; (result, carry, overflow, half_carry) } -fn sub_bytes(operand1: u8, operand2: u8) -> (u8, bool, bool) { +fn sub_bytes(operand1: u8, operand2: u8) -> (u8, bool, bool, bool) { let (result, carry) = operand1.overflowing_sub(operand2); let overflow = (operand1 & 0x80) != (operand2 & 0x80) && (operand1 & 0x80) != (result & 0x80); - (result, carry, overflow) + let half_carry = (operand1 & 0x0F) < (operand2 & 0x0F); + (result, carry, overflow, half_carry) } -fn sub_words(operand1: u16, operand2: u16) -> (u16, bool, bool) { +fn sub_words(operand1: u16, operand2: u16) -> (u16, bool, bool, bool) { let (result, carry) = operand1.overflowing_sub(operand2); let overflow = (operand1 & 0x8000) != (operand2 & 0x8000) && (operand1 & 0x8000) != (result & 0x8000); - (result, carry, overflow) + let half_carry = (operand1 & 0x0FFF) < (operand2 & 0x0FFF); + (result, carry, overflow, half_carry) } #[inline(always)] diff --git a/tests/rad_tests/latest.txt b/tests/rad_tests/latest.txt index cf56936..08640b9 100644 --- a/tests/rad_tests/latest.txt +++ b/tests/rad_tests/latest.txt @@ -1,4 +1,4 @@ -Last run on 2023-05-13 at commit d8638c6f82f45f6235784f96d8f5eb1a766bad52 +Last run on 2023-05-13 at commit cf4e31454b417b361b70fcbf82edf6a1daf62eb8 00.json completed, all passed! 01.json completed, all passed! @@ -552,7 +552,7 @@ ed 5b.json completed, all passed! ed 5c.json completed, all passed! ed 5d.json completed: 0 passed, 1000 FAILED ed 5e.json completed, all passed! -ed 5f.json completed: 2 passed, 998 FAILED +ed 5f.json completed: 0 passed, 1000 FAILED ed 60.json completed: 0 passed, 1000 FAILED ed 61.json completed: 0 passed, 1000 FAILED ed 62.json completed, all passed! @@ -655,5 +655,5 @@ fd fe.json completed: 0 passed, 1000 FAILED fe.json completed, all passed! ff.json completed, all passed! -passed: 545965, failed: 108035, total 83% -completed in 10m 35s +passed: 545963, failed: 108037, total 83% +completed in 10m 48s diff --git a/tests/rad_tests/progress/2023-05-13-without-undocumented-but-with-half-carry.txt b/tests/rad_tests/progress/2023-05-13-without-undocumented-but-with-half-carry.txt new file mode 100644 index 0000000..62d3bb5 --- /dev/null +++ b/tests/rad_tests/progress/2023-05-13-without-undocumented-but-with-half-carry.txt @@ -0,0 +1,659 @@ +Last run on 2023-05-13 at commit cf4e31454b417b361b70fcbf82edf6a1daf62eb8 + +00.json completed, all passed! +01.json completed, all passed! +02.json completed, all passed! +03.json completed, all passed! +04.json completed, all passed! +05.json completed: 505 passed, 495 FAILED +06.json completed, all passed! +07.json completed, all passed! +08.json completed, all passed! +09.json completed: 483 passed, 517 FAILED +0a.json completed, all passed! +0b.json completed, all passed! +0c.json completed, all passed! +0d.json completed: 499 passed, 501 FAILED +0e.json completed, all passed! +0f.json completed, all passed! +10.json completed, all passed! +100.json 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b/tests/rad_tests/progress/2023-05-13-without-undocumented-instr-and-flags.txt new file mode 100644 index 0000000..08640b9 --- /dev/null +++ b/tests/rad_tests/progress/2023-05-13-without-undocumented-instr-and-flags.txt @@ -0,0 +1,659 @@ +Last run on 2023-05-13 at commit cf4e31454b417b361b70fcbf82edf6a1daf62eb8 + +00.json completed, all passed! +01.json completed, all passed! +02.json completed, all passed! +03.json completed, all passed! +04.json completed, all passed! +05.json completed, all passed! +06.json completed, all passed! +07.json completed, all passed! +08.json completed, all passed! +09.json completed, all passed! +0a.json completed, all passed! +0b.json completed, all passed! +0c.json completed, all passed! +0d.json completed, all passed! +0e.json completed, all passed! +0f.json completed, all passed! +10.json completed, all passed! +100.json completed, all passed! +101.json completed, all passed! +11.json completed, all passed! +12.json completed, all passed! +13.json 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100644 --- a/tests/rad_tests/src/main.rs +++ b/tests/rad_tests/src/main.rs @@ -186,7 +186,7 @@ fn load_state(cpu: &mut Z80, system: &mut System, initial: &TestState) -> Result Ok(()) } -const IGNORE_FLAG_MASK: u8 = Flags::HalfCarry as u8 | Flags::F3 as u8 | Flags::F5 as u8; +const IGNORE_FLAG_MASK: u8 = Flags::F3 as u8 | Flags::F5 as u8; fn assert_state(cpu: &Z80, system: &System, expected: &TestState, check_extra_flags: bool) -> Result<(), Error> { assert_value(cpu.state.reg[0], expected.b, "b")?; @@ -379,16 +379,15 @@ fn is_undocumented_instruction(name: &str) -> bool { opcodes.extend(vec![0; 3 - opcodes.len()]); match (opcodes[0], opcodes[1]) { - (0xCB, _) => { - opcodes[1] >= 0x30 && opcodes[1] <= 0x37 + (0xCB, op) => { + op >= 0x30 && op <= 0x37 }, (0xDD, 0xCB) | (0xFD, 0xCB) => { !(opcodes[2] & 0x07 == 0x06 && opcodes[2] != 0x36) }, - (0xDD, _) | - (0xFD, _) => { - let op = opcodes[1]; + (0xDD, op) | + (0xFD, op) => { let upper3 = op & 0x70; let upper4 = op & 0xF0; let lower = op & 0x0F; @@ -399,9 +398,11 @@ fn is_undocumented_instruction(name: &str) -> bool { !(lower == 0x09 && upper4 <= 0x30) && !(op == 0xE1 || op == 0xE3 || op == 0xE5 || op == 0xE9 || op == 0xF9) }, - //0xED => { - - //}, + (0xED, op) => { + // NOTE this assumes the tests don't have the missing instructions, or the Z180 instructions + // so it only checks for the undocumented ones + op == 0x63 || op == 0x6B || op == 0x70 || op == 0x71 + }, _ => false } }