Fixed some IY instructions, and a few minor fixes
This commit is contained in:
transistor
parent
e959b8df1c
commit
f0cbf5f2ca
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@ -517,7 +517,7 @@ impl Z80Decoder {
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match get_ins_x(ins) {
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0 => {
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if (ins & 0x0F) == 9 {
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return Ok(Instruction::ADD16(RegisterPair::IX, get_register_pair_index(get_ins_p(ins), index_reg)));
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return Ok(Instruction::ADD16(index_reg.into(), get_register_pair_index(get_ins_p(ins), index_reg)));
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}
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match get_ins_p(ins) {
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@ -525,11 +525,11 @@ impl Z80Decoder {
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match get_ins_z(ins) {
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1 => {
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let data = self.read_instruction_word(memory)?;
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Ok(Instruction::LD(LoadTarget::DirectRegWord(get_register_pair_from_index(index_reg)), LoadTarget::ImmediateWord(data)))
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Ok(Instruction::LD(LoadTarget::DirectRegWord(index_reg.into()), LoadTarget::ImmediateWord(data)))
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},
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2 => {
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let addr = self.read_instruction_word(memory)?;
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let regpair = get_register_pair_from_index(index_reg);
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let regpair = index_reg.into();
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match get_ins_q(ins) != 0 {
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false => Ok(Instruction::LD(LoadTarget::IndirectWord(addr), LoadTarget::DirectRegWord(regpair))),
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true => Ok(Instruction::LD(LoadTarget::DirectRegWord(regpair), LoadTarget::IndirectWord(addr))),
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@ -537,8 +537,8 @@ impl Z80Decoder {
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},
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3 => {
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match get_ins_q(ins) != 0 {
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false => Ok(Instruction::INC16(get_register_pair_from_index(index_reg))),
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true => Ok(Instruction::DEC16(get_register_pair_from_index(index_reg))),
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false => Ok(Instruction::INC16(index_reg.into())),
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true => Ok(Instruction::DEC16(index_reg.into())),
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}
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},
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4 => {
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@ -650,11 +650,11 @@ impl Z80Decoder {
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},
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3 => {
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match ins {
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0xE1 => Ok(Instruction::POP(get_register_pair_from_index(index_reg))),
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0xE3 => Ok(Instruction::EXsp(get_register_pair_from_index(index_reg))),
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0xE5 => Ok(Instruction::PUSH(get_register_pair_from_index(index_reg))),
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0xE9 => Ok(Instruction::JPIndirect(get_register_pair_from_index(index_reg))),
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0xF9 => Ok(Instruction::LD(LoadTarget::DirectRegWord(RegisterPair::SP), LoadTarget::DirectRegWord(get_register_pair_from_index(index_reg)))),
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0xE1 => Ok(Instruction::POP(index_reg.into())),
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0xE3 => Ok(Instruction::EXsp(index_reg.into())),
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0xE5 => Ok(Instruction::PUSH(index_reg.into())),
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0xE9 => Ok(Instruction::JPIndirect(index_reg.into())),
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0xF9 => Ok(Instruction::LD(LoadTarget::DirectRegWord(RegisterPair::SP), LoadTarget::DirectRegWord(index_reg.into()))),
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_ => Ok(Instruction::NOP),
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}
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},
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@ -721,6 +721,15 @@ impl Z80Decoder {
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}
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}
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impl From<IndexRegister> for RegisterPair {
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fn from(value: IndexRegister) -> Self {
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match value {
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IndexRegister::IX => RegisterPair::IX,
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IndexRegister::IY => RegisterPair::IY,
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}
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}
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}
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fn get_alu_instruction(alu: u8, target: Target) -> Instruction {
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match alu {
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0 => Instruction::ADDa(target),
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@ -787,7 +796,7 @@ fn get_register_pair_index(reg: u8, index_reg: IndexRegister) -> RegisterPair {
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match reg {
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0 => RegisterPair::BC,
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1 => RegisterPair::DE,
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2 => get_register_pair_from_index(index_reg),
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2 => index_reg.into(),
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3 => RegisterPair::SP,
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_ => panic!("InternalError: impossible value"),
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}
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@ -803,13 +812,6 @@ fn get_register_pair_alt(reg: u8) -> RegisterPair {
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}
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}
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fn get_register_pair_from_index(reg: IndexRegister) -> RegisterPair {
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match reg {
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IndexRegister::IX => RegisterPair::IX,
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IndexRegister::IY => RegisterPair::IY,
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}
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}
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fn get_index_register_half(reg: IndexRegister, q: u8) -> IndexRegisterHalf {
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match reg {
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IndexRegister::IX => if q == 0 { IndexRegisterHalf::IXH } else { IndexRegisterHalf::IXL },
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@ -1,4 +1,4 @@
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Last run on 2023-05-13 at commit c97b3b8aca39518b1a88a19ba236ac19c1717b25
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Last run on 2023-05-13 at commit e959b8df1c139f1565d6e6eb88597a35ffa780a2
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@ -0,0 +1,647 @@
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|
||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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||||
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|
||||
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|
||||
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|
||||
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||||
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|
||||
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||||
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||||
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||||
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||||
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|
||||
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|
||||
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||||
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||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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|
||||
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|
||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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||||
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||||
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|
||||
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||||
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||||
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||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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|
||||
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||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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|
||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
fd e3.json completed: 999 passed, 1 FAILED
|
||||
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|
||||
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|
||||
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|
||||
fe.json completed, all passed!
|
||||
ff.json completed, all passed!
|
||||
|
||||
passed: 576963, failed: 65037, total 90%
|
||||
completed in 0m 30s
|
||||
|
|
@ -423,14 +423,13 @@ fn is_undocumented_instruction(name: &str) -> bool {
|
|||
},
|
||||
(0xDD, op) |
|
||||
(0xFD, op) => {
|
||||
let upper3 = op & 0x70;
|
||||
let upper4 = op & 0xF0;
|
||||
let upper = op & 0xF0;
|
||||
let lower = op & 0x0F;
|
||||
!(lower == 0x06 && upper3 >= 0x30 && upper3 <= 0x60) &&
|
||||
!(lower == 0x0E && upper4 >= 0x40 && upper3 <= 0xB0) &&
|
||||
!(lower == 0x06 && upper >= 0x30 && upper <= 0xB0 && upper != 0x70) &&
|
||||
!(lower == 0x0E && upper >= 0x40 && upper <= 0xB0) &&
|
||||
!(op >= 0x70 && op <= 0x77 && op != 0x76) &&
|
||||
!(op >= 0x21 && op <= 0x23 && op >= 0x34 && op <= 0x36 && op >= 0x29 && op <= 0x2B) &&
|
||||
!(lower == 0x09 && upper4 <= 0x30) &&
|
||||
!(lower == 0x09 && upper <= 0x30) &&
|
||||
!(op == 0xE1 || op == 0xE3 || op == 0xE5 || op == 0xE9 || op == 0xF9)
|
||||
},
|
||||
(0xED, op) => {
|
||||
|
|
|
|||
1
todo.txt
1
todo.txt
|
|
@ -3,6 +3,7 @@
|
|||
* you could have busport take a closure or something which translates the address, and returns an error that will be passed up if it occurs
|
||||
in order to implement the correct behaviour for address exceptions in 68k, transparently
|
||||
|
||||
* should you make Address a newtype and add From impls for each type of numeric, and add utils to wrap address at certain boundaries and such
|
||||
* should you make a means of storing different kinds of buses?
|
||||
* should you make buses hide their RcRefCell?
|
||||
|
||||
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Reference in New Issue