mirror of
https://github.com/transistorfet/moa.git
synced 2024-11-21 19:30:52 +00:00
Fixed bug in MOVEM and added tests for it
It was previously decrementing addresses if the direction was from registers to memory, but that's incorrect. It should increment the address always when using an addressing mode other than the ARecDec mode. I also added a memory location to the test cases to test the MOVEM instruction by comparing what memory was read/written (but it's only one u32 because that's the minimum we need)
This commit is contained in:
transistor
parent
02b10c5b32
commit
f601290771
@ -102,7 +102,7 @@ impl M68kDecoder {
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} else if (ins & 0x138) == 0x108 {
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let dreg = get_high_reg(ins);
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let areg = get_low_reg(ins);
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let dir = if (ins & 0x0800) == 0 { Direction::FromTarget } else { Direction::ToTarget };
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let dir = if (ins & 0x0080) == 0 { Direction::FromTarget } else { Direction::ToTarget };
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let size = if (ins & 0x0040) == 0 { Size::Word } else { Size::Long };
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let offset = self.read_instruction_word(memory)? as i16;
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Ok(Instruction::MOVEP(dreg, areg, offset, size, dir))
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@ -514,8 +514,7 @@ impl M68k {
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let mut addr = ((*self.get_a_reg_mut(areg) as i32) + (offset as i32)) as Address;
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while shift >= 0 {
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let byte = (self.state.d_reg[dreg as usize] >> shift) as u8;
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let data = if (addr & 0x1) == 0 { (byte as u16) << 8 } else { byte as u16 };
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self.port.write_beu16(addr, data)?;
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self.port.write_u8(addr, byte)?;
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addr += 2;
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shift -= 8;
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}
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@ -524,8 +523,7 @@ impl M68k {
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let mut shift = (size.in_bytes() as i32 * 8) - 8;
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let mut addr = ((*self.get_a_reg_mut(areg) as i32) + (offset as i32)) as Address;
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while shift >= 0 {
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let data = self.port.read_beu16(addr)?;
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let byte = if (addr & 0x1) == 0 { (data >> 8) as u8 } else { data as u8 };
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let byte = self.port.read_u8(addr)?;
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self.state.d_reg[dreg as usize] |= (byte as u32) << shift;
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addr += 2;
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shift -= 8;
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@ -718,6 +716,7 @@ impl M68k {
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fn execute_movem(&mut self, target: Target, size: Size, dir: Direction, mut mask: u16) -> Result<(), Error> {
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let mut addr = self.get_target_address(target)?;
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// If we're using a MC68020 or higher, and it was Post-Inc/Pre-Dec target, then update the value before it's stored
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if self.cputype >= M68kType::MC68020 {
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match target {
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@ -729,45 +728,32 @@ impl M68k {
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}
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}
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if dir == Direction::ToTarget {
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for i in (0..8).rev() {
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if (mask & 0x01) != 0 {
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let value = *self.get_a_reg_mut(i);
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addr -= size.in_bytes();
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self.set_address_sized(addr as Address, value, size)?;
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let post_addr = match target {
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Target::IndirectARegInc(reg) => {
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if dir != Direction::FromTarget {
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return Err(Error::new(&format!("Cannot use {:?} with {:?}", target, dir)));
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}
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mask >>= 1;
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}
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for i in (0..8).rev() {
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if (mask & 0x01) != 0 {
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addr -= size.in_bytes();
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self.set_address_sized(addr as Address, self.state.d_reg[i], size)?;
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self.move_memory_to_registers(addr, size, mask)?
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},
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Target::IndirectARegDec(reg) => {
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if dir != Direction::ToTarget {
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return Err(Error::new(&format!("Cannot use {:?} with {:?}", target, dir)));
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}
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mask >>= 1;
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}
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} else {
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let mut mask = mask;
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for i in 0..8 {
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if (mask & 0x01) != 0 {
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self.state.d_reg[i] = sign_extend_to_long(self.get_address_sized(addr as Address, size)?, size) as u32;
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addr += size.in_bytes();
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self.move_registers_to_memory_reverse(addr, size, mask)?
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},
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_ => {
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match dir {
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Direction::ToTarget => self.move_registers_to_memory(addr, size, mask)?,
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Direction::FromTarget => self.move_memory_to_registers(addr, size, mask)?,
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}
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mask >>= 1;
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}
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for i in 0..8 {
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if (mask & 0x01) != 0 {
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*self.get_a_reg_mut(i) = sign_extend_to_long(self.get_address_sized(addr as Address, size)?, size) as u32;
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addr += size.in_bytes();
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}
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mask >>= 1;
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}
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}
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},
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};
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// If it was Post-Inc/Pre-Dec target, then update the value
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match target {
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Target::IndirectARegInc(reg) | Target::IndirectARegDec(reg) => {
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let a_reg_mut = self.get_a_reg_mut(reg);
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*a_reg_mut = addr;
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*a_reg_mut = post_addr;
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}
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_ => { },
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}
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@ -775,6 +761,62 @@ impl M68k {
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Ok(())
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}
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pub fn move_memory_to_registers(&mut self, mut addr: u32, size: Size, mut mask: u16) -> Result<u32, Error> {
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for i in 0..8 {
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if (mask & 0x01) != 0 {
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self.state.d_reg[i] = sign_extend_to_long(self.get_address_sized(addr as Address, size)?, size) as u32;
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addr += size.in_bytes();
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}
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mask >>= 1;
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}
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for i in 0..8 {
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if (mask & 0x01) != 0 {
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*self.get_a_reg_mut(i) = sign_extend_to_long(self.get_address_sized(addr as Address, size)?, size) as u32;
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addr += size.in_bytes();
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}
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mask >>= 1;
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}
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Ok(addr)
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}
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pub fn move_registers_to_memory(&mut self, mut addr: u32, size: Size, mut mask: u16) -> Result<u32, Error> {
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for i in 0..8 {
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if (mask & 0x01) != 0 {
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self.set_address_sized(addr as Address, self.state.d_reg[i], size)?;
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addr += size.in_bytes();
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}
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mask >>= 1;
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}
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for i in 0..8 {
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if (mask & 0x01) != 0 {
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let value = *self.get_a_reg_mut(i);
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self.set_address_sized(addr as Address, value, size)?;
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addr += size.in_bytes();
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}
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mask >>= 1;
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}
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Ok(addr)
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}
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pub fn move_registers_to_memory_reverse(&mut self, mut addr: u32, size: Size, mut mask: u16) -> Result<u32, Error> {
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for i in (0..8).rev() {
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if (mask & 0x01) != 0 {
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let value = *self.get_a_reg_mut(i);
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addr -= size.in_bytes();
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self.set_address_sized(addr as Address, value, size)?;
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}
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mask >>= 1;
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}
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for i in (0..8).rev() {
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if (mask & 0x01) != 0 {
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addr -= size.in_bytes();
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self.set_address_sized(addr as Address, self.state.d_reg[i], size)?;
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}
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mask >>= 1;
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}
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Ok(addr)
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}
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fn push_word(&mut self, value: u16) -> Result<(), Error> {
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*self.get_stack_pointer_mut() -= 2;
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let addr = *self.get_stack_pointer_mut();
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@ -8,7 +8,7 @@ mod decode_tests {
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use crate::cpus::m68k::{M68k, M68kType};
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use crate::cpus::m68k::state::Exceptions;
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use crate::cpus::m68k::instructions::{Instruction, Target, Size, Sign, XRegister, BaseRegister, IndexRegister, ShiftDirection};
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use crate::cpus::m68k::instructions::{Instruction, Target, Size, Sign, XRegister, BaseRegister, IndexRegister, Direction, ShiftDirection};
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const INIT_STACK: Address = 0x00002000;
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const INIT_ADDR: Address = 0x00000010;
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@ -38,6 +38,10 @@ mod decode_tests {
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TestCase { cpu: M68kType::MC68000, data: &[0x0C00, 0x0010], ins: Some(Instruction::CMP(Target::Immediate(0x10), Target::DirectDReg(0), Size::Byte)) },
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TestCase { cpu: M68kType::MC68000, data: &[0x81FC, 0x0003], ins: Some(Instruction::DIVW(Target::Immediate(3), 0, Sign::Signed)) },
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TestCase { cpu: M68kType::MC68000, data: &[0xC1FC, 0x0276], ins: Some(Instruction::MULW(Target::Immediate(0x276), 0, Sign::Signed)) },
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TestCase { cpu: M68kType::MC68000, data: &[0x0108, 0x1234], ins: Some(Instruction::MOVEP(0, 0, 0x1234, Size::Word, Direction::FromTarget)) },
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TestCase { cpu: M68kType::MC68000, data: &[0x0148, 0x1234], ins: Some(Instruction::MOVEP(0, 0, 0x1234, Size::Long, Direction::FromTarget)) },
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TestCase { cpu: M68kType::MC68000, data: &[0x0188, 0x1234], ins: Some(Instruction::MOVEP(0, 0, 0x1234, Size::Word, Direction::ToTarget)) },
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TestCase { cpu: M68kType::MC68000, data: &[0x01C8, 0x1234], ins: Some(Instruction::MOVEP(0, 0, 0x1234, Size::Long, Direction::ToTarget)) },
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TestCase { cpu: M68kType::MC68000, data: &[0xE300], ins: Some(Instruction::ASd(Target::Immediate(1), Target::DirectDReg(0), Size::Byte, ShiftDirection::Left)) },
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TestCase { cpu: M68kType::MC68000, data: &[0xE200], ins: Some(Instruction::ASd(Target::Immediate(1), Target::DirectDReg(0), Size::Byte, ShiftDirection::Right)) },
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TestCase { cpu: M68kType::MC68000, data: &[0xE318], ins: Some(Instruction::ROd(Target::Immediate(1), Target::DirectDReg(0), Size::Byte, ShiftDirection::Left)) },
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@ -354,11 +358,12 @@ mod execute_tests {
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use crate::cpus::m68k::{M68k, M68kType};
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use crate::cpus::m68k::state::{M68kState};
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use crate::cpus::m68k::instructions::{Instruction, Target, Size, Sign, ShiftDirection, Condition};
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use crate::cpus::m68k::instructions::{Instruction, Target, Size, Sign, ShiftDirection, Direction, Condition};
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const INIT_STACK: Address = 0x00002000;
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const INIT_ADDR: Address = 0x00000010;
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const MEM_ADDR: u32 = 0x00001234;
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struct TestState {
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pc: u32,
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@ -368,6 +373,7 @@ mod execute_tests {
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d1: u32,
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a0: u32,
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a1: u32,
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mem: u32,
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sr: u16,
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}
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@ -429,6 +435,7 @@ mod execute_tests {
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let init_state = build_state(&case.init);
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let expected_state = build_state(&case.fini);
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system.get_bus().write_beu32(MEM_ADDR as Address, case.init.mem).unwrap();
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load_memory(&system, case.data);
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cpu.state = init_state;
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@ -438,6 +445,9 @@ mod execute_tests {
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cpu.execute_current().unwrap();
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assert_eq!(cpu.state, expected_state);
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let mem = system.get_bus().read_beu32(MEM_ADDR as Address).unwrap();
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assert_eq!(mem, case.fini.mem);
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}
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#[test]
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@ -455,264 +465,376 @@ mod execute_tests {
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ins: Instruction::NOP,
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data: &[ 0x4e71 ],
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cputype: M68kType::MC68010,
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init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
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fini: TestState { pc: 0x00000002, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
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init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700, mem: 0x00000000 },
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fini: TestState { pc: 0x00000002, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700, mem: 0x00000000 },
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},
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TestCase {
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name: "addi with no overflow or carry",
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ins: Instruction::ADD(Target::Immediate(0x7f), Target::DirectDReg(0), Size::Byte),
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data: &[ 0x0600, 0x007F ],
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cputype: M68kType::MC68010,
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init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
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fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0x0000007f, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
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init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700, mem: 0x00000000 },
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fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0x0000007f, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700, mem: 0x00000000 },
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},
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TestCase {
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name: "addi with no overflow but negative",
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ins: Instruction::ADD(Target::Immediate(0x80), Target::DirectDReg(0), Size::Byte),
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data: &[ 0x0600, 0x0080 ],
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cputype: M68kType::MC68010,
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init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000001, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
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fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000081, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2708 },
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init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000001, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700, mem: 0x00000000 },
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fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000081, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2708, mem: 0x00000000 },
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},
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TestCase {
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name: "addi with overflow",
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ins: Instruction::ADD(Target::Immediate(0x7f), Target::DirectDReg(0), Size::Byte),
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data: &[ 0x0600, 0x007F ],
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cputype: M68kType::MC68010,
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init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000001, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
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fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000080, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x270A },
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init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000001, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700, mem: 0x00000000 },
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fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000080, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x270A, mem: 0x00000000 },
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},
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TestCase {
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name: "addi with carry",
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ins: Instruction::ADD(Target::Immediate(0x80), Target::DirectDReg(0), Size::Byte),
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data: &[ 0x0600, 0x0080 ],
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cputype: M68kType::MC68010,
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init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000080, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
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fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2717 },
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init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000080, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700, mem: 0x00000000 },
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fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2717, mem: 0x00000000 },
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},
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TestCase {
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name: "adda immediate",
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ins: Instruction::ADDA(Target::Immediate(0xF800), 0, Size::Word),
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data: &[ 0xD0FC, 0xF800 ],
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cputype: M68kType::MC68010,
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init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x27FF },
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fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0xFFFFF800, a1: 0x00000000, sr: 0x27FF },
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init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x27FF, mem: 0x00000000 },
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fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0xFFFFF800, a1: 0x00000000, sr: 0x27FF, mem: 0x00000000 },
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},
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TestCase {
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name: "adda register",
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ins: Instruction::ADDA(Target::DirectDReg(0), 0, Size::Word),
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data: &[ 0xD0C0 ],
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cputype: M68kType::MC68010,
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init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x0000F800, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x27FF },
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fini: TestState { pc: 0x00000002, ssp: 0x00000000, usp: 0x00000000, d0: 0x0000F800, d1: 0x00000000, a0: 0xFFFFF800, a1: 0x00000000, sr: 0x27FF },
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init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x0000F800, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x27FF, mem: 0x00000000 },
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fini: TestState { pc: 0x00000002, ssp: 0x00000000, usp: 0x00000000, d0: 0x0000F800, d1: 0x00000000, a0: 0xFFFFF800, a1: 0x00000000, sr: 0x27FF, mem: 0x00000000 },
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},
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TestCase {
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name: "andi with sr",
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ins: Instruction::ANDtoSR(0xF8FF),
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data: &[ 0x027C, 0xF8FF ],
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cputype: M68kType::MC68010,
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init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0xA7AA },
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fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0xA0AA },
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0xA7AA, mem: 0x00000000 },
|
||||
fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0xA0AA, mem: 0x00000000 },
|
||||
},
|
||||
TestCase {
|
||||
name: "asl",
|
||||
ins: Instruction::ASd(Target::Immediate(1), Target::DirectDReg(0), Size::Byte, ShiftDirection::Left),
|
||||
data: &[ 0xE300 ],
|
||||
cputype: M68kType::MC68010,
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000001, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
|
||||
fini: TestState { pc: 0x00000002, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000002, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000001, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700, mem: 0x00000000 },
|
||||
fini: TestState { pc: 0x00000002, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000002, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700, mem: 0x00000000 },
|
||||
},
|
||||
TestCase {
|
||||
name: "asr",
|
||||
ins: Instruction::ASd(Target::Immediate(1), Target::DirectDReg(0), Size::Byte, ShiftDirection::Right),
|
||||
data: &[ 0xE200 ],
|
||||
cputype: M68kType::MC68010,
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000081, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
|
||||
fini: TestState { pc: 0x00000002, ssp: 0x00000000, usp: 0x00000000, d0: 0x000000C0, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2719 },
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000081, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700, mem: 0x00000000 },
|
||||
fini: TestState { pc: 0x00000002, ssp: 0x00000000, usp: 0x00000000, d0: 0x000000C0, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2719, mem: 0x00000000 },
|
||||
},
|
||||
TestCase {
|
||||
name: "blt with jump",
|
||||
ins: Instruction::Bcc(Condition::LessThan, 8),
|
||||
data: &[ 0x6D08 ],
|
||||
cputype: M68kType::MC68010,
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2709 },
|
||||
fini: TestState { pc: 0x0000000A, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2709 },
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2709, mem: 0x00000000 },
|
||||
fini: TestState { pc: 0x0000000A, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2709, mem: 0x00000000 },
|
||||
},
|
||||
TestCase {
|
||||
name: "blt with jump",
|
||||
ins: Instruction::Bcc(Condition::LessThan, 8),
|
||||
data: &[ 0x6D08 ],
|
||||
cputype: M68kType::MC68010,
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
|
||||
fini: TestState { pc: 0x00000002, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700, mem: 0x00000000 },
|
||||
fini: TestState { pc: 0x00000002, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700, mem: 0x00000000 },
|
||||
},
|
||||
TestCase {
|
||||
name: "bchg not zero",
|
||||
ins: Instruction::BCHG(Target::Immediate(7), Target::DirectDReg(1), Size::Long),
|
||||
data: &[ 0x0841, 0x0007 ],
|
||||
cputype: M68kType::MC68010,
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x000000FF, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
|
||||
fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x0000007F, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x000000FF, a0: 0x00000000, a1: 0x00000000, sr: 0x2700, mem: 0x00000000 },
|
||||
fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x0000007F, a0: 0x00000000, a1: 0x00000000, sr: 0x2700, mem: 0x00000000 },
|
||||
},
|
||||
TestCase {
|
||||
name: "bchg zero",
|
||||
ins: Instruction::BCHG(Target::Immediate(7), Target::DirectDReg(1), Size::Long),
|
||||
data: &[ 0x0841, 0x0007 ],
|
||||
cputype: M68kType::MC68010,
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
|
||||
fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000080, a0: 0x00000000, a1: 0x00000000, sr: 0x2704 },
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700, mem: 0x00000000 },
|
||||
fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000080, a0: 0x00000000, a1: 0x00000000, sr: 0x2704, mem: 0x00000000 },
|
||||
},
|
||||
TestCase {
|
||||
name: "bra 8-bit",
|
||||
ins: Instruction::BRA(-32),
|
||||
data: &[ 0x60E0 ],
|
||||
cputype: M68kType::MC68010,
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
|
||||
fini: TestState { pc: 0xFFFFFFE2, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700, mem: 0x00000000 },
|
||||
fini: TestState { pc: 0xFFFFFFE2, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700, mem: 0x00000000 },
|
||||
},
|
||||
TestCase {
|
||||
name: "cmpi equal",
|
||||
ins: Instruction::CMP(Target::Immediate(0x20), Target::DirectDReg(0), Size::Byte),
|
||||
data: &[ 0x0C00, 0x0020 ],
|
||||
cputype: M68kType::MC68010,
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000020, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
|
||||
fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000020, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2704 },
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000020, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700, mem: 0x00000000 },
|
||||
fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000020, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2704, mem: 0x00000000 },
|
||||
},
|
||||
TestCase {
|
||||
name: "cmpi greater than",
|
||||
ins: Instruction::CMP(Target::Immediate(0x30), Target::DirectDReg(0), Size::Byte),
|
||||
data: &[ 0x0C00, 0x0030 ],
|
||||
cputype: M68kType::MC68010,
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000020, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
|
||||
fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000020, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2709 },
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000020, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700, mem: 0x00000000 },
|
||||
fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000020, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2709, mem: 0x00000000 },
|
||||
},
|
||||
TestCase {
|
||||
name: "cmpi less than",
|
||||
ins: Instruction::CMP(Target::Immediate(0x10), Target::DirectDReg(0), Size::Byte),
|
||||
data: &[ 0x0C00, 0x0010 ],
|
||||
cputype: M68kType::MC68010,
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000020, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
|
||||
fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000020, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000020, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700, mem: 0x00000000 },
|
||||
fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000020, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700, mem: 0x00000000 },
|
||||
},
|
||||
TestCase {
|
||||
name: "cmpi no overflow",
|
||||
ins: Instruction::CMP(Target::Immediate(0x7F), Target::DirectDReg(0), Size::Byte),
|
||||
data: &[ 0x0C00, 0x007F ],
|
||||
cputype: M68kType::MC68010,
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
|
||||
fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2709 },
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700, mem: 0x00000000 },
|
||||
fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2709, mem: 0x00000000 },
|
||||
},
|
||||
TestCase {
|
||||
name: "cmpi no overflow, already negative",
|
||||
ins: Instruction::CMP(Target::Immediate(0x8001), Target::DirectDReg(0), Size::Word),
|
||||
data: &[ 0x0C40, 0x8001 ],
|
||||
cputype: M68kType::MC68010,
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
|
||||
fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2701 },
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700, mem: 0x00000000 },
|
||||
fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2701, mem: 0x00000000 },
|
||||
},
|
||||
TestCase {
|
||||
name: "cmpi with overflow",
|
||||
ins: Instruction::CMP(Target::Immediate(0x80), Target::DirectDReg(0), Size::Byte),
|
||||
data: &[ 0x0C00, 0x0080 ],
|
||||
cputype: M68kType::MC68010,
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
|
||||
fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x270B },
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700, mem: 0x00000000 },
|
||||
fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x270B, mem: 0x00000000 },
|
||||
},
|
||||
TestCase {
|
||||
name: "cmpi with overflow 2",
|
||||
ins: Instruction::CMP(Target::Immediate(0x8001), Target::DirectDReg(0), Size::Word),
|
||||
data: &[ 0x0C40, 0x8001 ],
|
||||
cputype: M68kType::MC68010,
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000001, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
|
||||
fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000001, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x270B },
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000001, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700, mem: 0x00000000 },
|
||||
fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000001, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x270B, mem: 0x00000000 },
|
||||
},
|
||||
TestCase {
|
||||
name: "cmpi no carry",
|
||||
ins: Instruction::CMP(Target::Immediate(0x01), Target::DirectDReg(0), Size::Byte),
|
||||
data: &[ 0x0C00, 0x0001 ],
|
||||
cputype: M68kType::MC68010,
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x000000FF, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
|
||||
fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0x000000FF, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2708 },
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x000000FF, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700, mem: 0x00000000 },
|
||||
fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0x000000FF, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2708, mem: 0x00000000 },
|
||||
},
|
||||
TestCase {
|
||||
name: "cmpi with carry",
|
||||
ins: Instruction::CMP(Target::Immediate(0xFF), Target::DirectDReg(0), Size::Byte),
|
||||
data: &[ 0x0C00, 0x00FF ],
|
||||
cputype: M68kType::MC68010,
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000001, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
|
||||
fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000001, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2701 },
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000001, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700, mem: 0x00000000 },
|
||||
fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000001, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2701, mem: 0x00000000 },
|
||||
},
|
||||
TestCase {
|
||||
name: "divu",
|
||||
ins: Instruction::DIVW(Target::Immediate(0x0245), 0, Sign::Unsigned),
|
||||
data: &[ 0x80FC, 0x0245 ],
|
||||
cputype: M68kType::MC68010,
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00040000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
|
||||
fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0x007101C3, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00040000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700, mem: 0x00000000 },
|
||||
fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0x007101C3, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700, mem: 0x00000000 },
|
||||
},
|
||||
TestCase {
|
||||
name: "eori",
|
||||
ins: Instruction::EOR(Target::DirectDReg(1), Target::DirectDReg(0), Size::Long),
|
||||
data: &[ 0xB380 ],
|
||||
cputype: M68kType::MC68010,
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0xAAAA5555, d1: 0x55AA55AA, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
|
||||
fini: TestState { pc: 0x00000002, ssp: 0x00000000, usp: 0x00000000, d0: 0xFF0000FF, d1: 0x55AA55AA, a0: 0x00000000, a1: 0x00000000, sr: 0x2708 },
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0xAAAA5555, d1: 0x55AA55AA, a0: 0x00000000, a1: 0x00000000, sr: 0x2700, mem: 0x00000000 },
|
||||
fini: TestState { pc: 0x00000002, ssp: 0x00000000, usp: 0x00000000, d0: 0xFF0000FF, d1: 0x55AA55AA, a0: 0x00000000, a1: 0x00000000, sr: 0x2708, mem: 0x00000000 },
|
||||
},
|
||||
TestCase {
|
||||
name: "exg",
|
||||
ins: Instruction::EXG(Target::DirectDReg(0), Target::DirectAReg(1)),
|
||||
data: &[ 0xC189 ],
|
||||
cputype: M68kType::MC68010,
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x12345678, d1: 0x00000000, a0: 0x00000000, a1: 0x87654321, sr: 0x2700 },
|
||||
fini: TestState { pc: 0x00000002, ssp: 0x00000000, usp: 0x00000000, d0: 0x87654321, d1: 0x00000000, a0: 0x00000000, a1: 0x12345678, sr: 0x2700 },
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x12345678, d1: 0x00000000, a0: 0x00000000, a1: 0x87654321, sr: 0x2700, mem: 0x00000000 },
|
||||
fini: TestState { pc: 0x00000002, ssp: 0x00000000, usp: 0x00000000, d0: 0x87654321, d1: 0x00000000, a0: 0x00000000, a1: 0x12345678, sr: 0x2700, mem: 0x00000000 },
|
||||
},
|
||||
TestCase {
|
||||
name: "ext",
|
||||
ins: Instruction::EXT(0, Size::Byte, Size::Word),
|
||||
data: &[ 0x4880 ],
|
||||
cputype: M68kType::MC68010,
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x000000CB, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x27FF },
|
||||
fini: TestState { pc: 0x00000002, ssp: 0x00000000, usp: 0x00000000, d0: 0x0000FFCB, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x27F8 },
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x000000CB, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x27FF, mem: 0x00000000 },
|
||||
fini: TestState { pc: 0x00000002, ssp: 0x00000000, usp: 0x00000000, d0: 0x0000FFCB, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x27F8, mem: 0x00000000 },
|
||||
},
|
||||
TestCase {
|
||||
name: "ext",
|
||||
ins: Instruction::EXT(0, Size::Word, Size::Long),
|
||||
data: &[ 0x48C0 ],
|
||||
cputype: M68kType::MC68010,
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x000000CB, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x27FF },
|
||||
fini: TestState { pc: 0x00000002, ssp: 0x00000000, usp: 0x00000000, d0: 0x000000CB, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x27F0 },
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x000000CB, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x27FF, mem: 0x00000000 },
|
||||
fini: TestState { pc: 0x00000002, ssp: 0x00000000, usp: 0x00000000, d0: 0x000000CB, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x27F0, mem: 0x00000000 },
|
||||
},
|
||||
TestCase {
|
||||
name: "muls",
|
||||
ins: Instruction::MULW(Target::Immediate(0x0276), 0, Sign::Signed),
|
||||
data: &[ 0xC1FC, 0x0276 ],
|
||||
cputype: M68kType::MC68010,
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000200, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
|
||||
fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0x0004ec00, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000200, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700, mem: 0x00000000 },
|
||||
fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0x0004ec00, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700, mem: 0x00000000 },
|
||||
},
|
||||
TestCase {
|
||||
name: "movel",
|
||||
ins: Instruction::MOVE(Target::DirectDReg(0), Target::DirectDReg(1), Size::Long),
|
||||
data: &[ 0x2200 ],
|
||||
cputype: M68kType::MC68010,
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0xFEDCBA98, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
|
||||
fini: TestState { pc: 0x00000002, ssp: 0x00000000, usp: 0x00000000, d0: 0xFEDCBA98, d1: 0xFEDCBA98, a0: 0x00000000, a1: 0x00000000, sr: 0x2708 },
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0xFEDCBA98, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700, mem: 0x00000000 },
|
||||
fini: TestState { pc: 0x00000002, ssp: 0x00000000, usp: 0x00000000, d0: 0xFEDCBA98, d1: 0xFEDCBA98, a0: 0x00000000, a1: 0x00000000, sr: 0x2708, mem: 0x00000000 },
|
||||
},
|
||||
TestCase {
|
||||
name: "movea",
|
||||
ins: Instruction::MOVEA(Target::DirectDReg(0), 0, Size::Long),
|
||||
data: &[ 0x2040 ],
|
||||
cputype: M68kType::MC68010,
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0xFEDCBA98, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x27FF },
|
||||
fini: TestState { pc: 0x00000002, ssp: 0x00000000, usp: 0x00000000, d0: 0xFEDCBA98, d1: 0x00000000, a0: 0xFEDCBA98, a1: 0x00000000, sr: 0x27FF },
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0xFEDCBA98, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x27FF, mem: 0x00000000 },
|
||||
fini: TestState { pc: 0x00000002, ssp: 0x00000000, usp: 0x00000000, d0: 0xFEDCBA98, d1: 0x00000000, a0: 0xFEDCBA98, a1: 0x00000000, sr: 0x27FF, mem: 0x00000000 },
|
||||
},
|
||||
|
||||
// MOVEM
|
||||
TestCase {
|
||||
name: "movem word to target",
|
||||
ins: Instruction::MOVEM(Target::IndirectAReg(0), Size::Word, Direction::ToTarget, 0x0003),
|
||||
data: &[ 0x4890, 0x0003 ],
|
||||
cputype: M68kType::MC68010,
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0xABCD1234, d1: 0xEFEF5678, a0: MEM_ADDR, a1: 0x00000000, sr: 0x27FF, mem: 0x00000000 },
|
||||
fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0xABCD1234, d1: 0xEFEF5678, a0: MEM_ADDR, a1: 0x00000000, sr: 0x27FF, mem: 0x12345678 },
|
||||
},
|
||||
TestCase {
|
||||
name: "movem long to target",
|
||||
ins: Instruction::MOVEM(Target::IndirectAReg(0), Size::Long, Direction::ToTarget, 0x0001),
|
||||
data: &[ 0x48D0, 0x0001 ],
|
||||
cputype: M68kType::MC68010,
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0xABCD1234, d1: 0x00000000, a0: MEM_ADDR, a1: 0x00000000, sr: 0x27FF, mem: 0x00000000 },
|
||||
fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0xABCD1234, d1: 0x00000000, a0: MEM_ADDR, a1: 0x00000000, sr: 0x27FF, mem: 0xABCD1234 },
|
||||
},
|
||||
TestCase {
|
||||
name: "movem long from target",
|
||||
ins: Instruction::MOVEM(Target::IndirectAReg(0), Size::Long, Direction::FromTarget, 0x0001),
|
||||
data: &[ 0x4CD0, 0x0001 ],
|
||||
cputype: M68kType::MC68010,
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: MEM_ADDR, a1: 0x00000000, sr: 0x27FF, mem: 0xABCD1234 },
|
||||
fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0xABCD1234, d1: 0x00000000, a0: MEM_ADDR, a1: 0x00000000, sr: 0x27FF, mem: 0xABCD1234 },
|
||||
},
|
||||
TestCase {
|
||||
name: "movem word from target inc",
|
||||
ins: Instruction::MOVEM(Target::IndirectARegInc(0), Size::Word, Direction::FromTarget, 0x0001),
|
||||
data: &[ 0x4C98, 0x0001 ],
|
||||
cputype: M68kType::MC68010,
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0xFFFFFFFF, d1: 0x00000000, a0: MEM_ADDR, a1: 0x00000000, sr: 0x27FF, mem: 0xABCD1234 },
|
||||
fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0xFFFFABCD, d1: 0x00000000, a0: MEM_ADDR+2, a1: 0x00000000, sr: 0x27FF, mem: 0xABCD1234 },
|
||||
},
|
||||
TestCase {
|
||||
name: "movem long to target dec",
|
||||
ins: Instruction::MOVEM(Target::IndirectARegDec(0), Size::Long, Direction::ToTarget, 0x8000),
|
||||
data: &[ 0x48E0, 0x8000 ],
|
||||
cputype: M68kType::MC68010,
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0xABCD1234, d1: 0x00000000, a0: MEM_ADDR+4, a1: 0x00000000, sr: 0x27FF, mem: 0x00000000 },
|
||||
fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0xABCD1234, d1: 0x00000000, a0: MEM_ADDR, a1: 0x00000000, sr: 0x27FF, mem: 0xABCD1234 },
|
||||
},
|
||||
|
||||
|
||||
// MOVEP
|
||||
TestCase {
|
||||
name: "movep word to even memory",
|
||||
ins: Instruction::MOVEP(0, 0, 0, Size::Word, Direction::ToTarget),
|
||||
data: &[ 0x0188, 0x0000 ],
|
||||
cputype: M68kType::MC68010,
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x000055AA, d1: 0x00000000, a0: MEM_ADDR, a1: 0x00000000, sr: 0x27FF, mem: 0xFFFFFFFF },
|
||||
fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0x000055AA, d1: 0x00000000, a0: MEM_ADDR, a1: 0x00000000, sr: 0x27FF, mem: 0x55FFAAFF },
|
||||
},
|
||||
TestCase {
|
||||
name: "movep word to odd memory",
|
||||
ins: Instruction::MOVEP(0, 0, 1, Size::Word, Direction::ToTarget),
|
||||
data: &[ 0x0188, 0x0001 ],
|
||||
cputype: M68kType::MC68010,
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x000055AA, d1: 0x00000000, a0: MEM_ADDR, a1: 0x00000000, sr: 0x27FF, mem: 0xFFFFFFFF },
|
||||
fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0x000055AA, d1: 0x00000000, a0: MEM_ADDR, a1: 0x00000000, sr: 0x27FF, mem: 0xFF55FFAA },
|
||||
},
|
||||
TestCase {
|
||||
name: "movep long to even memory upper",
|
||||
ins: Instruction::MOVEP(0, 0, 0, Size::Long, Direction::ToTarget),
|
||||
data: &[ 0x01C8, 0x0000 ],
|
||||
cputype: M68kType::MC68010,
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0xAABBCCDD, d1: 0x00000000, a0: MEM_ADDR, a1: 0x00000000, sr: 0x27FF, mem: 0xFFFFFFFF },
|
||||
fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0xAABBCCDD, d1: 0x00000000, a0: MEM_ADDR, a1: 0x00000000, sr: 0x27FF, mem: 0xAAFFBBFF },
|
||||
},
|
||||
TestCase {
|
||||
name: "movep long to even memory lower",
|
||||
ins: Instruction::MOVEP(0, 0, 0, Size::Long, Direction::ToTarget),
|
||||
data: &[ 0x01C8, 0x0000 ],
|
||||
cputype: M68kType::MC68010,
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0xAABBCCDD, d1: 0x00000000, a0: MEM_ADDR-4, a1: 0x00000000, sr: 0x27FF, mem: 0xFFFFFFFF },
|
||||
fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0xAABBCCDD, d1: 0x00000000, a0: MEM_ADDR-4, a1: 0x00000000, sr: 0x27FF, mem: 0xCCFFDDFF },
|
||||
},
|
||||
TestCase {
|
||||
name: "movep word from even memory",
|
||||
ins: Instruction::MOVEP(0, 0, 0, Size::Word, Direction::FromTarget),
|
||||
data: &[ 0x0108, 0x0000 ],
|
||||
cputype: M68kType::MC68010,
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: MEM_ADDR, a1: 0x00000000, sr: 0x27FF, mem: 0x55FFAAFF },
|
||||
fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0x000055AA, d1: 0x00000000, a0: MEM_ADDR, a1: 0x00000000, sr: 0x27FF, mem: 0x55FFAAFF },
|
||||
},
|
||||
TestCase {
|
||||
name: "movep word from odd memory",
|
||||
ins: Instruction::MOVEP(0, 0, 1, Size::Word, Direction::FromTarget),
|
||||
data: &[ 0x0108, 0x0001 ],
|
||||
cputype: M68kType::MC68010,
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: MEM_ADDR, a1: 0x00000000, sr: 0x27FF, mem: 0xFF55FFAA },
|
||||
fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0x000055AA, d1: 0x00000000, a0: MEM_ADDR, a1: 0x00000000, sr: 0x27FF, mem: 0xFF55FFAA },
|
||||
},
|
||||
TestCase {
|
||||
name: "movep long from even memory upper",
|
||||
ins: Instruction::MOVEP(0, 0, 0, Size::Long, Direction::FromTarget),
|
||||
data: &[ 0x0148, 0x0000 ],
|
||||
cputype: M68kType::MC68010,
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: MEM_ADDR, a1: 0x00000000, sr: 0x27FF, mem: 0xAAFFBBFF },
|
||||
fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0xAABB0000, d1: 0x00000000, a0: MEM_ADDR, a1: 0x00000000, sr: 0x27FF, mem: 0xAAFFBBFF },
|
||||
},
|
||||
TestCase {
|
||||
name: "movep long from even memory lower",
|
||||
ins: Instruction::MOVEP(0, 0, 0, Size::Long, Direction::FromTarget),
|
||||
data: &[ 0x0148, 0x0000 ],
|
||||
cputype: M68kType::MC68010,
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: MEM_ADDR-4, a1: 0x00000000, sr: 0x27FF, mem: 0xCCFFDDFF },
|
||||
fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0x0000CCDD, d1: 0x00000000, a0: MEM_ADDR-4, a1: 0x00000000, sr: 0x27FF, mem: 0xCCFFDDFF },
|
||||
},
|
||||
|
||||
|
||||
// NEG
|
||||
TestCase {
|
||||
name: "neg",
|
||||
ins: Instruction::NEG(Target::DirectDReg(0), Size::Word),
|
||||
data: &[ 0x4440 ],
|
||||
cputype: M68kType::MC68010,
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000080, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
|
||||
fini: TestState { pc: 0x00000002, ssp: 0x00000000, usp: 0x00000000, d0: 0x0000FF80, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2719 },
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000080, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700, mem: 0x00000000 },
|
||||
fini: TestState { pc: 0x00000002, ssp: 0x00000000, usp: 0x00000000, d0: 0x0000FF80, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2719, mem: 0x00000000 },
|
||||
},
|
||||
|
||||
|
||||
@ -721,16 +843,16 @@ mod execute_tests {
|
||||
ins: Instruction::OR(Target::Immediate(0xFF), Target::DirectAReg(0), Size::Byte),
|
||||
data: &[ 0x0008, 0x00FF ],
|
||||
cputype: M68kType::MC68010,
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
|
||||
fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x000000FF, a1: 0x00000000, sr: 0x2708 },
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700, mem: 0x00000000 },
|
||||
fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x000000FF, a1: 0x00000000, sr: 0x2708, mem: 0x00000000 },
|
||||
},
|
||||
TestCase {
|
||||
name: "ori with sr",
|
||||
ins: Instruction::ORtoSR(0x00AA),
|
||||
data: &[ 0x007C, 0x00AA ],
|
||||
cputype: M68kType::MC68010,
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0xA755 },
|
||||
fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0xA7FF },
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0xA755, mem: 0x00000000 },
|
||||
fini: TestState { pc: 0x00000004, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0xA7FF, mem: 0x00000000 },
|
||||
},
|
||||
|
||||
|
||||
@ -740,48 +862,48 @@ mod execute_tests {
|
||||
ins: Instruction::ROd(Target::Immediate(1), Target::DirectDReg(0), Size::Byte, ShiftDirection::Left),
|
||||
data: &[ 0xE318 ],
|
||||
cputype: M68kType::MC68010,
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000080, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
|
||||
fini: TestState { pc: 0x00000002, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000001, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2701 },
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000080, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700, mem: 0x00000000 },
|
||||
fini: TestState { pc: 0x00000002, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000001, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2701, mem: 0x00000000 },
|
||||
},
|
||||
TestCase {
|
||||
name: "ror",
|
||||
ins: Instruction::ROd(Target::Immediate(1), Target::DirectDReg(0), Size::Byte, ShiftDirection::Right),
|
||||
data: &[ 0xE218 ],
|
||||
cputype: M68kType::MC68010,
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000001, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
|
||||
fini: TestState { pc: 0x00000002, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000080, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2709 },
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000001, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700, mem: 0x00000000 },
|
||||
fini: TestState { pc: 0x00000002, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000080, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2709, mem: 0x00000000 },
|
||||
},
|
||||
TestCase {
|
||||
name: "roxl",
|
||||
ins: Instruction::ROXd(Target::Immediate(1), Target::DirectDReg(0), Size::Byte, ShiftDirection::Left),
|
||||
data: &[ 0xE310 ],
|
||||
cputype: M68kType::MC68010,
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000080, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
|
||||
fini: TestState { pc: 0x00000002, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2715 },
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000080, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700, mem: 0x00000000 },
|
||||
fini: TestState { pc: 0x00000002, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2715, mem: 0x00000000 },
|
||||
},
|
||||
TestCase {
|
||||
name: "roxr",
|
||||
ins: Instruction::ROXd(Target::Immediate(1), Target::DirectDReg(0), Size::Byte, ShiftDirection::Right),
|
||||
data: &[ 0xE210 ],
|
||||
cputype: M68kType::MC68010,
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000001, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
|
||||
fini: TestState { pc: 0x00000002, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2715 },
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000001, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700, mem: 0x00000000 },
|
||||
fini: TestState { pc: 0x00000002, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000000, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2715, mem: 0x00000000 },
|
||||
},
|
||||
TestCase {
|
||||
name: "roxl two bits",
|
||||
ins: Instruction::ROXd(Target::Immediate(2), Target::DirectDReg(0), Size::Byte, ShiftDirection::Left),
|
||||
data: &[ 0xE510 ],
|
||||
cputype: M68kType::MC68010,
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000080, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
|
||||
fini: TestState { pc: 0x00000002, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000001, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000080, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700, mem: 0x00000000 },
|
||||
fini: TestState { pc: 0x00000002, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000001, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700, mem: 0x00000000 },
|
||||
},
|
||||
TestCase {
|
||||
name: "roxr two bits",
|
||||
ins: Instruction::ROXd(Target::Immediate(2), Target::DirectDReg(0), Size::Byte, ShiftDirection::Right),
|
||||
data: &[ 0xE410 ],
|
||||
cputype: M68kType::MC68010,
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000001, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700 },
|
||||
fini: TestState { pc: 0x00000002, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000080, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2708 },
|
||||
init: TestState { pc: 0x00000000, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000001, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2700, mem: 0x00000000 },
|
||||
fini: TestState { pc: 0x00000002, ssp: 0x00000000, usp: 0x00000000, d0: 0x00000080, d1: 0x00000000, a0: 0x00000000, a1: 0x00000000, sr: 0x2708, mem: 0x00000000 },
|
||||
},
|
||||
];
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user