Commit Graph

9 Commits

Author SHA1 Message Date
transistor
e3819fe549 Added timing to m68k implementation 2021-12-14 21:13:01 -08:00
transistor
3fc76335d0 Moved m68k instruction types to their own file 2021-10-18 12:05:10 -07:00
transistor
94141e112e Reorganized decode and add some support for other m68k processors 2021-10-10 14:26:54 -07:00
transistor
7bd7f3e64f Added cpu to system, and refactored m68k a bit 2021-10-07 11:35:15 -07:00
transistor
10e905674b Added MUL, DIV, NEG, DBcc, and Scc instructions, and fixed issue with ADD/SUB flags
With ADDA, SUBA, and ADDQ/SUBQ when the target is an address register, the condition
flags should not be changed, but the code was changing them, which caused problems.
I've fixed it by making the ADD/SUB executions check for an address target and
will not update flags in that case.  This should only occur when the actual instruction
was an ADDA or ADDQ with an address register target
2021-10-02 21:59:28 -07:00
transistor
4b577ad403 Separated debugging code into its own file 2021-10-02 09:35:25 -07:00
transistor
b0f094cb59 Added start of a testsuite 2021-10-01 19:27:05 -07:00
transistor
f7529bbb41 Added PTY terminal for I/O via the MC68681 module
Also fixed a bug where MOVEA needs to behave differently than MOVE,
such that the data is sign extended to a long and the condition flags
are not changed.  I also modifed how Addressable returns data because
I need to return owned data from MC68681, so that the stored data can
be updated (ie. the status flag must be modified after a read)
2021-10-01 12:25:23 -07:00
transistor
9095333793 Reorganized and started working on the execution code 2021-09-29 17:11:48 -07:00