301 lines
7.6 KiB
Rust
301 lines
7.6 KiB
Rust
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use core::fmt::{self, Write};
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use femtos::{Duration, Frequency};
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use crate::debugger::M68kDebugger;
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use crate::instructions::Target;
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use crate::execute::M68kCycle;
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pub type ClockCycles = u16;
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#[allow(dead_code)]
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#[derive(Copy, Clone, Debug, PartialEq, Eq, PartialOrd, Ord)]
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#[repr(u8)]
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pub enum AddressWidth {
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A32 = 32, // MC68020+
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A24 = 24, // MC68000 64-Pin, MC68010
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A22 = 22, // MC68008 52-Pin
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A20 = 20, // MC68008 48-Pin
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}
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#[allow(dead_code)]
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#[derive(Copy, Clone, Debug, PartialEq, Eq, PartialOrd, Ord)]
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#[repr(u8)]
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pub enum DataWidth {
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D32 = 32,
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D16 = 16,
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D8 = 8,
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}
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/// The instruction set of the chip
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#[allow(dead_code)]
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#[derive(Copy, Clone, Debug, PartialEq, Eq, PartialOrd, Ord)]
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pub enum CoreType {
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MC68000,
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MC68010,
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MC68020,
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MC68030,
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}
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/// Complete collection of information about the CPU being simulated
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#[allow(dead_code)]
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#[derive(Copy, Clone, Debug, PartialEq, Eq, PartialOrd, Ord)]
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pub struct CpuInfo {
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pub chip: M68kType,
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pub core_type: CoreType,
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pub address_width: AddressWidth,
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pub data_width: DataWidth,
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pub frequency: Frequency,
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}
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/// The variant of the 68k family of CPUs that is being emulated
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///
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/// This can be used as a shorthand for creating a CpuInfo that
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/// can be used by the simuation code to determine behaviour
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#[allow(dead_code)]
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#[derive(Copy, Clone, Debug, PartialEq, Eq, PartialOrd, Ord)]
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pub enum M68kType {
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MC68000,
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MC68008,
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MC68010,
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MC68020,
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MC68030,
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}
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impl From<M68kType> for CoreType {
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fn from(cputype: M68kType) -> Self {
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match cputype {
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M68kType::MC68000 => CoreType::MC68000,
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M68kType::MC68008 => CoreType::MC68000,
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M68kType::MC68010 => CoreType::MC68010,
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M68kType::MC68020 => CoreType::MC68020,
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M68kType::MC68030 => CoreType::MC68030,
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}
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}
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}
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impl CpuInfo {
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pub fn from_type(cputype: M68kType, frequency: Frequency) -> Self {
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match cputype {
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M68kType::MC68008 => Self {
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chip: cputype,
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core_type: cputype.into(),
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address_width: AddressWidth::A22,
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data_width: DataWidth::D8,
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frequency,
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},
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M68kType::MC68000 | M68kType::MC68010 => Self {
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chip: cputype,
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core_type: cputype.into(),
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address_width: AddressWidth::A24,
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data_width: DataWidth::D16,
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frequency,
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},
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M68kType::MC68020 | M68kType::MC68030 => Self {
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chip: cputype,
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core_type: cputype.into(),
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address_width: AddressWidth::A32,
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data_width: DataWidth::D32,
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frequency,
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}
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}
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}
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}
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const FLAGS_ON_RESET: u16 = 0x2700;
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#[repr(u16)]
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#[allow(dead_code)]
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#[derive(Copy, Clone, Debug, PartialEq, Eq)]
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pub enum Flags {
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Carry = 0x0001,
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Overflow = 0x0002,
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Zero = 0x0004,
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Negative = 0x0008,
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Extend = 0x0010,
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IntMask = 0x0700,
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Interrupt = 0x1000,
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Supervisor = 0x2000,
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Tracing = 0x8000,
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}
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#[repr(u8)]
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#[allow(dead_code)]
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#[derive(Copy, Clone, Debug, PartialEq, Eq)]
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pub enum Exceptions {
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BusError = 2,
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AddressError = 3,
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IllegalInstruction = 4,
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ZeroDivide = 5,
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ChkInstruction = 6,
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TrapvInstruction = 7,
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PrivilegeViolation = 8,
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Trace = 9,
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LineAEmulator = 10,
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LineFEmulator = 11,
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}
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#[derive(Copy, Clone, Debug, PartialEq, Eq)]
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pub enum Status {
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Init,
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Running,
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Stopped,
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}
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#[repr(u8)]
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#[derive(Copy, Clone, Debug, PartialEq, Eq)]
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pub enum InterruptPriority {
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NoInterrupt = 0,
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Level1 = 1,
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Level2 = 2,
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Level3 = 3,
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Level4 = 4,
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Level5 = 5,
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Level6 = 6,
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Level7 = 7,
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}
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#[derive(Clone, Debug, PartialEq, Eq)]
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pub struct M68kState {
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pub status: Status,
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pub current_ipl: InterruptPriority,
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pub pending_ipl: InterruptPriority,
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pub pc: u32,
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pub sr: u16,
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pub d_reg: [u32; 8],
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pub a_reg: [u32; 7],
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pub ssp: u32,
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pub usp: u32,
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pub vbr: u32,
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}
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#[derive(Clone, Debug, thiserror::Error)]
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pub enum M68kError<BusError> {
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#[error("cpu halted")]
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Halted,
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#[error("processor exception {0:?}")]
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Exception(Exceptions),
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#[error("interrupt vector {0} occurred")]
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Interrupt(u8),
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#[error("breakpoint reached")]
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Breakpoint,
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#[error("invalid instruction target, direct value used as a pointer: {0:?}")]
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InvalidTarget(Target),
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#[error("bus error")]
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BusError(BusError),
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#[error("error: {0}")]
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Other(String),
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}
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#[derive(Clone)]
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pub struct M68kStatistics {
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pub cycle_number: usize,
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pub last_update: usize,
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pub last_time: std::time::SystemTime,
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}
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impl Default for M68kStatistics {
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fn default() -> Self {
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Self {
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cycle_number: 0,
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last_update: 0,
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last_time: std::time::SystemTime::now(),
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}
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}
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}
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#[derive(Clone)]
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pub struct M68k {
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pub info: CpuInfo,
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pub state: M68kState,
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pub debugger: M68kDebugger,
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pub stats: M68kStatistics,
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pub cycle: Option<M68kCycle>,
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}
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impl Default for M68kState {
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fn default() -> M68kState {
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M68kState {
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status: Status::Init,
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current_ipl: InterruptPriority::NoInterrupt,
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pending_ipl: InterruptPriority::NoInterrupt,
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pc: 0,
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sr: FLAGS_ON_RESET,
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d_reg: [0; 8],
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a_reg: [0; 7],
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ssp: 0,
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usp: 0,
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vbr: 0,
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}
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}
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}
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impl M68kState {
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pub fn dump_state<W: Write>(&mut self, writer: &mut W) -> Result<(), fmt::Error> {
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writeln!(writer, "Status: {:?}", self.status)?;
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writeln!(writer, "PC: {:#010x}", self.pc)?;
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writeln!(writer, "SR: {:#06x}", self.sr)?;
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for i in 0..7 {
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writeln!(writer, "D{}: {:#010x} A{}: {:#010x}", i, self.d_reg[i as usize], i, self.a_reg[i as usize])?;
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}
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writeln!(writer, "D7: {:#010x} USP: {:#010x}", self.d_reg[7], self.usp)?;
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writeln!(writer, " SSP: {:#010x}", self.ssp)?;
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Ok(())
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}
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}
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impl M68k {
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pub fn new(info: CpuInfo) -> Self {
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M68k {
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info,
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state: M68kState::default(),
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debugger: M68kDebugger::default(),
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stats: Default::default(),
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cycle: None,
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}
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}
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pub fn from_type(cputype: M68kType, freq: Frequency) -> Self {
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Self::new(CpuInfo::from_type(cputype, freq))
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}
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pub fn dump_state<W: Write>(&mut self, writer: &mut W) {
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self.state.dump_state(writer);
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if let Some(cycle) = self.cycle.as_ref() {
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println!("Current Instruction: {:#010x} {:?}", cycle.decoder.start, cycle.decoder.instruction);
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println!();
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}
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//memory::dump_memory(&mut self.port, self.cycle.current_clock, self.state.ssp, 0x40);
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println!();
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}
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#[inline]
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pub fn last_cycle_duration(&self) -> Duration {
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let clocks = self.cycle.as_ref().map(|cycle| cycle.timing.calculate_clocks()).unwrap_or(4);
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self.info.frequency.period_duration() * clocks as u64
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}
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}
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impl InterruptPriority {
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pub fn from_u8(priority: u8) -> InterruptPriority {
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match priority {
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0 => InterruptPriority::NoInterrupt,
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1 => InterruptPriority::Level1,
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2 => InterruptPriority::Level2,
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3 => InterruptPriority::Level3,
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4 => InterruptPriority::Level4,
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5 => InterruptPriority::Level5,
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6 => InterruptPriority::Level6,
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_ => InterruptPriority::Level7,
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}
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}
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}
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