moa/todo.txt
transistor 93c080eae6 Fixed interrupts
Previously the m68k wasn't masking interrupts with an equal priorty.
I also modified how they work, such that the cpus will check the
controller rather than wait for the notification call
2021-10-29 22:02:29 -07:00

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* i need a better way of handling disperate reads/writes to I/O spaces, rather than having multiple devices or having a massive chunk of address space allocated, continuously
* should you modify Addressable to also take the absolute address as input? I'm thinking of how the same device could be mapped to multiple addresses in memory instead
of taking up a whole range of addresses
* implement a Z80
* maybe see about a Mac 128k or something
* add instruction timing to M68k
* YM7101 timing is causing it to be very slow... speeding this up increasing rendering speed a lot, even though the frame shouldn't be drawn that often... not sure what's wrong with the timing
* make the ym7101 set/reset the v_int occurred flag based on the interrupt controller
* each device that can make a bus request should have a BusPort which is used to access the bus
* separate the debugger out of m68k
* make devices nameable, using a hashmap to store them
* you could modify read()/write() in Addressable to return the number of bytes read or written for dynamic bus sizing used by the MC68020+
* should you simulate bus arbitration?
* make tests for each instruction
* check all instructions in the docs
* unimplemented: ABCD, ADDX, BFFFO, BFINS, BKPT, CHK, EXG, ILLEGAL, MOVEfromCCR, MOVEP, RTR, RTD, SBCD, SUBX
* >=MC68020 undecoded & unimplemented: CALLM, CAS, CAS2, CHK2, CMP2, RTM, PACK, TRAPcc, UNPK
* add support for MMU
* add support for FPU
* Coprocessor instructions: cpBcc, cpDBcc, cpGEN, cpScc, cpTRAPcc
* how can you have multple CPUs
* can you eventually make the system connections all configurable via a config file?