mirror of
https://github.com/ctm/syn68k.git
synced 2024-12-11 07:50:44 +00:00
358 lines
8.1 KiB
Perl
358 lines
8.1 KiB
Perl
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#!/usr/bin/perl
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sub mem_range
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{
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local ($base, $offset, $size) = @_;
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local ($result, $real_size);
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$real_size = 1 if ($size eq "b");
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$real_size = 2 if ($size eq "w");
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$real_size = 4 if ($size eq "l");
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foreach (0 .. $real_size-1)
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{
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$result .= $base . ($offset + $_) . ' ';
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}
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chop $result;
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return $result;
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}
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sub break_it_down
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{
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local($operand, $size) = @_;
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local ($result);
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# No operand
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if (!$operand)
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{
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return "";
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}
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# _cpu_state+offset
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if ($operand =~ /^_cpu_state(\+\d+)?$/)
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{
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return &mem_range ("mem_cs_", $1, $size);
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}
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# _cpu_state...
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if ($operand =~ /^_cpu_state/)
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{
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return "mem_cs_.*";
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}
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# %reg
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if ($operand =~ /^%(.*)$/)
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{
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die "No info for $1, $size"
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if (!defined ($register_info{$1, $size}));
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return $register_info{$1, $size};
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}
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# Memory ref
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if ($operand =~ /^[_A-Za-z]/)
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{
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return "mem_.*";
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}
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# offset(%reg)
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if ($operand =~ /^([^%()]*)\(%(e[a-z][a-z])\)$/)
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{
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return &mem_range ("mem_code_", $1, $size) if ($2 eq 'esi');
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return &mem_range ("mem_bp_", $1, $size) if ($2 eq 'ebp');
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return "mem_.*";
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}
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# ($reg, $reg, n)
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if ($operand =~ /$\(%e[a-z][a-z],%e[a-z][a-z],[24])\)/)
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{
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return ("mem_.* ");
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}
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# ($reg, $reg)
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if ($operand =~ /$\(%e[a-z][a-z],%e[a-z][a-z])\)/)
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{
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return ("mem_.*");
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}
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# $constant
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if ($operand =~ /^\$.*$/)
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{
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return "";
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}
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# offset(,$reg,const)
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if ($operand =~ /^(-?\d+)?\(,%e[a-z][a-z],\d+\)$/)
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{
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return "mem_.*";
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}
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die "Unrecognized operand $operand\n";
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}
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# Recognize an instruction. Returns (inputs, outputs, latency).
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sub recognize
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{
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local ($insn) = @_;
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local ($operand_regexp) = '((.*\(.*\).*)|([^\(\)]+))';
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local ($mnem, @operands);
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local ($inputs, $outputs, $latency, $reg);
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local ($no_union_inputs);
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$_ = $insn;
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$no_union_inputs = 0;
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# First, grab the mnemonic and the operand(s)
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grab:
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{
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if (/^\t([a-z]+) $operand_regexp,\s*$operand_regexp$/)
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{
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$mnem = $1;
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@operands = ($2, $5);
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# print "$insn\n";
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# print " Operand 1: $operands[0] Operand 2: $operands[1]\n";
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last grab;
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}
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elsif (/^\t([a-z]+) $operand_regexp$/)
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{
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$mnem = $1;
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@operands = ($2);
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# print "$insn\n";
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# print " Operand: $2\n";
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last grab;
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}
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elsif (/^\t([a-z]+)$/)
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{
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$mnem = $1;
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# print " No operands\n";
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last grab;
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}
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elsif (/^([^\t]|\t\.)/)
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{
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last grab;
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}
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die "Unable to figure out $insn\n";
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}
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# Barrier if we couldn't find the mnemonic.
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return (".*", ".*", 1) if (!$mnem);
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$inputs .= "eip "; # everyone takes program counter as input
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# Find registers in parens and add to inputs
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foreach $reg (keys %regs)
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{
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if (/\([^\)]*%$reg[^\)]*\)/)
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{
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$inputs .= &break_it_down ("%$reg", "l") . " ";
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}
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}
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$_ = $mnem;
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the_switch:
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{
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local ($op, $len, $srclen, $dstlen);
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# Easy binops
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if (($op, $len) = /^(adc|add|cmp|sbb|sub|test|and|or|xor)([bwl])$/) {
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die if (@operands != 2);
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$inputs .= "reg_ccc " if ($op = /^adc/);
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$outputs .= "reg_cco reg_ccs reg_ccz reg_cca reg_ccp reg_ccc ";
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$inputs .= &break_it_down ($operands[0], $len) . " ";
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$inputs .= &break_it_down ($operands[1], $len) . " ";
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if ($op !~ /^cmp|test$/)
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{
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$outputs .= &break_it_down ($operands[1], $len) . " ";
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}
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last the_switch;
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}
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# Easy uniops
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if (($op, $len) = /^(dec|inc|neg|not|bswap)([bwl])?$/) {
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die if (@operands != 1);
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$len = "l" if (!$len);
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$outputs .= "reg_cco reg_ccs reg_ccz reg_cca reg_ccp reg_ccc "
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if ($op =~ /^neg$/);
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$outputs .= "reg_cco reg_ccs reg_ccz reg_cca reg_ccp "
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if ($op =~ /^dec|inc/);
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$inputs .= &break_it_down ($operands[0], $len) . " ";
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$outputs .= &break_it_down ($operands[0], $len) . " ";
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last the_switch;
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}
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# Set
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if (($op) = /^(set.*)$/) {
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die if (@operands != 1);
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$inputs .= "reg_cco reg_ccs reg_ccz reg_cca reg_ccp reg_ccc ";
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$outputs .= &break_it_down ($operands[0], "b") . " ";
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last the_switch;
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}
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# When we jmp to the next instruction, note that nearly everything
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# is dead.
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if ((/^jmp$/) && (@operands == 1) && ($operands[0] =~ /^\*%edi$/)) {
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$inputs .= "reg_di_.* ";
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$outputs .= "eip reg_cco reg_ccs reg_ccz reg_cca reg_ccp reg_ccc "
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. "reg_a_.* reg_b_.* reg_c_.* reg_d_.* reg_di_.* ";
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$no_union_inputs = 1;
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last the_switch;
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}
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# Barriers
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if (/^[j.].*|call|ret|leave$/) {
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$inputs .= ".* ";
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$outputs .= "eip "; # program counter
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last the_switch;
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}
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# Shifts
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if (($op, $len) = /^(rc|ro|sa|sh)[rl]([bwl])$/) {
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die if (@operands != 2);
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$inputs .= "reg_ccc "
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if ($op =~ /^rc/); #FIXME - not sure if this is right
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$outputs .= "reg_cco reg_ccs reg_ccz reg_cca reg_ccp reg_ccc ";
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$inputs .= &break_it_down ($operands[0], "b") . " ";
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$inputs .= &break_it_down ($operands[1], $len) . " ";
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$outputs .= &break_it_down ($operands[1], $len) . " ";
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last the_switch;
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}
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# Divide
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if (($op, $len) = /^(div|idiv|mul|imul)([bwl])$/) {
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local ($inout);
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die if (@operands != 1 && @operands != 2);
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$inout .= "reg_cco reg_ccs reg_ccz reg_cca reg_ccp reg_ccc ";
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if (@operands == 1)
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{
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if ($len eq "b")
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{
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$inout .= &break_it_down ("%ax", "w") . " ";
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}
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elsif ($len eq "w")
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{
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$inout .= (&break_it_down ("%ax", "w") . " "
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. &break_it_down ("%dx", "w") . " ");
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}
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elsif ($len eq "l")
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{
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$inout .= (&break_it_down ("%eax", "l") . " "
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. &break_it_down ("%edx", "l") . " ");
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}
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}
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else
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{
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$inout .= ".* "; # be paranoid, who cares.
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}
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$inputs .= $inout;
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$outputs .= $inout;
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last the_switch;
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}
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# LEA and MOV
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if (($op, $len) = /^(lea|mov)([bwl])$/) {
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die if (@operands != 2);
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if ($op eq "mov")
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{
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$inputs .= &break_it_down ($operands[0], $len) . " ";
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}
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$outputs .= &break_it_down ($operands[1], $len) . " ";
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last the_switch;
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}
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# Move and extend
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if (($op, $srclen, $dstlen) = /^(mov[sz])([bwl])([bwl])$/) {
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die if (@operands != 2);
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$inputs .= &break_it_down ($operands[0], $srclen) . " ";
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$outputs .= &break_it_down ($operands[1], $dstlen) . " ";
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last the_switch;
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}
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# Push and pop
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if (($op, $len) = /^(push|pop)([bwl])$/) {
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die if (@operands != 1);
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$inputs .= &break_it_down ("%esp", "l") . " ";
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$outputs .= &break_it_down ("%esp", "l") . " ";
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if ($op eq "push")
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{
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$inputs .= &break_it_down ($operands[0], $len) . " ";
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$outputs .= &break_it_down ("(%esp)", $len) . " ";
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}
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else
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{
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$inputs .= &break_it_down ("(%esp)", $len) . " ";
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$outputs .= &break_it_down ($operands[0], $len) . " ";
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}
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last the_switch;
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}
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# LODS
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# if (($op, $len) = /^(lods)([bwl])$/) {
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# die if (@operands != 0);
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# $inputs .= &break_it_down ("%esi", "l") . " ";
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# $outputs .= &break_it_down ("%esi", "l") . " ";
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# $inputs .= &break_it_down ("(%esi)", $len) . " ";
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# $outputs .= &break_it_down ("%eax", $len) . " ";
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# $inputs .= "reg_ccd";
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# last the_switch;
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# }
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# CWTL
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if (($op, $len) = /^(cwt)(l)$/) {
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die if (@operands != 0);
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$inputs .= &break_it_down ("%ax", "w") . " ";
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$outputs .= &break_it_down ("%eax", "l") . " ";
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last the_switch;
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}
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# CLTD
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if (/^cltd$/) {
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die if (@operands != 0);
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$inputs .= &break_it_down ("%eax", "l") . " ";
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$outputs .= &break_it_down ("%edx", "l") . " ";
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last the_switch;
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}
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die "Unrecognized instruction $insn\n";
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}
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if (!$no_union_inputs) {
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$inputs .= join (' ', grep (/\*/, split (' ', $outputs))) . " ";
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}
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chop $inputs;
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chop $outputs;
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$inputs = &union ($inputs);
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$outputs = &union ($outputs);
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# print "$insn\n Inputs: $inputs\n Outputs: $outputs\n";
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return ($inputs, $outputs, 2);
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}
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sub compute_info
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{
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local($lineno) = @_;
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($inputs[$lineno], $outputs[$lineno], $latency[$lineno]) =
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&recognize ($lines[$lineno]);
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}
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open (REG, "reg") || die;
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while (<REG>)
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{
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local ($reg, $len, $info);
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chop;
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($reg, $len, $info) = split (/\t+/);
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$register_info{$reg, $len} = $info;
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$regs{$reg}++;
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}
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close (REG);
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