forked from Apple-2-HW/Apple2-IO-RPi
Update schematic and create rough PCB layout
This commit is contained in:
Terence Boldt
parent
d632a1d959
commit
dd5ddf4691
@ -436,6 +436,24 @@ X GND 9 -300 -1300 100 U 50 50 1 1 W
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ENDDRAW
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ENDDEF
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#
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# Device_C
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#
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DEF Device_C C 0 10 N Y 1 F N
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F0 "C" 25 100 50 H V L CNN
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F1 "Device_C" 25 -100 50 H V L CNN
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F2 "" 38 -150 50 H I C CNN
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F3 "" 0 0 50 H I C CNN
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$FPLIST
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C_*
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$ENDFPLIST
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DRAW
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P 2 0 1 20 -80 -30 80 -30 N
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P 2 0 1 20 -80 30 80 30 N
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X ~ 1 0 150 110 D 50 50 1 1 P
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X ~ 2 0 -150 110 U 50 50 1 1 P
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ENDDRAW
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ENDDEF
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#
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# Device_R
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#
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DEF Device_R R 0 0 N Y 1 F N
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BIN
Hardware/Apple2IORPi.jpg
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BIN
Hardware/Apple2IORPi.jpg
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Binary file not shown.
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After Width: | Height: | Size: 42 KiB |
File diff suppressed because it is too large
Load Diff
812
Hardware/Apple2IORPi.net
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812
Hardware/Apple2IORPi.net
Normal file
@ -0,0 +1,812 @@
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(export (version D)
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(design
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(source /home/terence/source/Apple2-IO-RPi/Hardware/Apple2IORPi.sch)
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(date "Thu 12 Nov 2020 09:25:57 PM")
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(tool "Eeschema 5.1.5+dfsg1-2build2")
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(sheet (number 1) (name /) (tstamps /)
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(title_block
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(title "Apple II I/O RPi")
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(company "Terence J. Boldt")
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(rev 0.3)
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(date 2020-11-12)
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(source Apple2IORPi.sch)
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(comment (number 1) (value "Initial draft desgn"))
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(comment (number 2) (value "Provides storage and network for the Apple ]["))
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(comment (number 3) (value "Raspberry Pi Zero W as a daughter board"))
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(comment (number 4) (value "Expansion card for Apple ][ computers")))))
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(components
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(comp (ref J0)
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(value "Apple II Expansion Bus")
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(footprint Connector_PCBEdge:Samtec_MECF-50-02-L-DV-WT_2x50_P1.27mm_Polarized_Socket_Horizontal)
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(datasheet ~)
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(libsource (lib Connector_Generic) (part Conn_02x25_Counter_Clockwise) (description "Generic connector, double row, 02x25, counter clockwise pin numbering scheme (similar to DIP packge numbering), script generated (kicad-library-utils/schlib/autogen/connector/)"))
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(sheetpath (names /) (tstamps /))
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(tstamp 5FA0A8C3))
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(comp (ref U1)
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(value 2764)
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(footprint Package_DIP:DIP-28_W15.24mm)
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(datasheet https://downloads.reactivemicro.com/Electronics/ROM/2764%20EPROM.pdf)
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(libsource (lib Memory_EPROM) (part 2764) (description "EPROM 64 KiBit, [Obsolete 2000-11]"))
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(sheetpath (names /) (tstamps /))
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(tstamp 5FA0EF8B))
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(comp (ref U0)
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(value 74LS245)
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(footprint Package_DIP:DIP-20_W7.62mm)
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(datasheet http://www.ti.com/lit/gpn/sn74LS245)
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(libsource (lib 74xx) (part 74LS245) (description "Octal BUS Transceivers, 3-State outputs"))
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(sheetpath (names /) (tstamps /))
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(tstamp 5FA15F43))
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(comp (ref U4)
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(value 74LS245)
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(footprint Package_DIP:DIP-20_W7.62mm)
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(datasheet http://www.ti.com/lit/gpn/sn74LS245)
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(libsource (lib 74xx) (part 74LS245) (description "Octal BUS Transceivers, 3-State outputs"))
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(sheetpath (names /) (tstamps /))
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(tstamp 5FA19168))
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(comp (ref J1)
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(value Raspberry_Pi_2_3)
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(footprint Connector_PinSocket_2.54mm:PinSocket_2x20_P2.54mm_Vertical)
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(datasheet https://www.raspberrypi.org/documentation/hardware/raspberrypi/schematics/rpi_SCH_3bplus_1p0_reduced.pdf)
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(libsource (lib Connector) (part Raspberry_Pi_2_3) (description "expansion header for Raspberry Pi 2 & 3"))
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(sheetpath (names /) (tstamps /))
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(tstamp 5FA19C2C))
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(comp (ref U5)
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(value 74LS374)
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(footprint Package_DIP:DIP-20_W7.62mm)
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(datasheet http://www.ti.com/lit/gpn/sn74LS374)
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(libsource (lib 74xx) (part 74LS374) (description "8-bit Register, 3-state outputs"))
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(sheetpath (names /) (tstamps /))
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(tstamp 5FA1EB22))
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(comp (ref R8)
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(value 3K)
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(footprint Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical)
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(datasheet ~)
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(libsource (lib Device) (part R) (description Resistor))
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(sheetpath (names /) (tstamps /))
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(tstamp 5FA241D5))
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(comp (ref R9)
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(value 3K)
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(footprint Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical)
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(datasheet ~)
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(libsource (lib Device) (part R) (description Resistor))
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(sheetpath (names /) (tstamps /))
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(tstamp 5FA246F6))
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(comp (ref RA1)
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(value 3K)
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(footprint Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical)
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(datasheet ~)
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(libsource (lib Device) (part R) (description Resistor))
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(sheetpath (names /) (tstamps /))
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(tstamp 5FA24EB1))
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(comp (ref RB1)
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(value 3K)
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(footprint Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical)
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(datasheet ~)
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(libsource (lib Device) (part R) (description Resistor))
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(sheetpath (names /) (tstamps /))
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(tstamp 5FA253F4))
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(comp (ref RC1)
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(value 3K)
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(footprint Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical)
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(datasheet ~)
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(libsource (lib Device) (part R) (description Resistor))
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(sheetpath (names /) (tstamps /))
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(tstamp 5FA25849))
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(comp (ref RD1)
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(value 3K)
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(footprint Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical)
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(datasheet ~)
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(libsource (lib Device) (part R) (description Resistor))
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(sheetpath (names /) (tstamps /))
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(tstamp 5FA25CA5))
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(comp (ref RE1)
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(value 3K)
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(footprint Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical)
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(datasheet ~)
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(libsource (lib Device) (part R) (description Resistor))
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(sheetpath (names /) (tstamps /))
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(tstamp 5FA2611D))
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(comp (ref RF1)
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(value 3K)
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(footprint Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical)
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(datasheet ~)
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(libsource (lib Device) (part R) (description Resistor))
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(sheetpath (names /) (tstamps /))
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(tstamp 5FA2686B))
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(comp (ref R0)
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(value 2K)
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(footprint Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical)
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(datasheet ~)
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(libsource (lib Device) (part R) (description Resistor))
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(sheetpath (names /) (tstamps /))
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(tstamp 5FAAFB0D))
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(comp (ref R1)
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(value 2K)
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(footprint Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical)
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(datasheet ~)
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(libsource (lib Device) (part R) (description Resistor))
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(sheetpath (names /) (tstamps /))
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(tstamp 5FAAFB13))
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(comp (ref R2)
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(value 2K)
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(footprint Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical)
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(datasheet ~)
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(libsource (lib Device) (part R) (description Resistor))
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(sheetpath (names /) (tstamps /))
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(tstamp 5FAAFB19))
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(comp (ref R3)
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(value 2K)
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(footprint Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical)
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(datasheet ~)
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(libsource (lib Device) (part R) (description Resistor))
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(sheetpath (names /) (tstamps /))
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(tstamp 5FAAFB1F))
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(comp (ref R4)
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(value 2K)
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(footprint Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical)
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(datasheet ~)
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(libsource (lib Device) (part R) (description Resistor))
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(sheetpath (names /) (tstamps /))
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(tstamp 5FAAFB25))
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(comp (ref R5)
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(value 2K)
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(footprint Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical)
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(datasheet ~)
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(libsource (lib Device) (part R) (description Resistor))
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(sheetpath (names /) (tstamps /))
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(tstamp 5FAAFB2B))
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(comp (ref R6)
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(value 2K)
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(footprint Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical)
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(datasheet ~)
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(libsource (lib Device) (part R) (description Resistor))
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(sheetpath (names /) (tstamps /))
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(tstamp 5FAAFB31))
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(comp (ref R7)
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(value 2K)
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(footprint Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical)
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(datasheet ~)
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(libsource (lib Device) (part R) (description Resistor))
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(sheetpath (names /) (tstamps /))
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(tstamp 5FAAFB37))
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(comp (ref U3)
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(value 74LS32)
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(footprint Package_DIP:DIP-14_W7.62mm)
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(datasheet http://www.ti.com/lit/gpn/sn74LS32)
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(libsource (lib 74xx) (part 74LS32) (description "Quad 2-input OR"))
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(sheetpath (names /) (tstamps /))
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(tstamp 5FB50A31))
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(comp (ref U2)
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(value 74LS00)
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(footprint Package_DIP:DIP-14_W7.62mm)
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(datasheet http://www.ti.com/lit/gpn/sn74ls00)
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(libsource (lib 74xx) (part 74LS00) (description "quad 2-input NAND gate"))
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(sheetpath (names /) (tstamps /))
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(tstamp 5FD4E618)))
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(libparts
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(libpart (lib 74xx) (part 74LS00)
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(aliases
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(alias 74LS37)
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(alias 7400)
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(alias 74HCT00)
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(alias 74HC00))
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(description "quad 2-input NAND gate")
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(docs http://www.ti.com/lit/gpn/sn74ls00)
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(footprints
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(fp DIP*W7.62mm*)
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(fp SO14*))
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(fields
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(field (name Reference) U)
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(field (name Value) 74LS00))
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(pins
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(pin (num 1) (name ~) (type input))
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(pin (num 2) (name ~) (type input))
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(pin (num 3) (name ~) (type output))
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(pin (num 4) (name ~) (type input))
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(pin (num 5) (name ~) (type input))
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(pin (num 6) (name ~) (type output))
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(pin (num 7) (name GND) (type power_in))
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(pin (num 8) (name ~) (type output))
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(pin (num 9) (name ~) (type input))
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(pin (num 10) (name ~) (type input))
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(pin (num 11) (name ~) (type output))
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(pin (num 12) (name ~) (type input))
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(pin (num 13) (name ~) (type input))
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(pin (num 14) (name VCC) (type power_in))))
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(libpart (lib 74xx) (part 74LS245)
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(aliases
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(alias 74HC245))
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(description "Octal BUS Transceivers, 3-State outputs")
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(docs http://www.ti.com/lit/gpn/sn74LS245)
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(footprints
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(fp DIP?20*))
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(fields
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(field (name Reference) U)
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(field (name Value) 74LS245))
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(pins
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(pin (num 1) (name A->B) (type input))
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(pin (num 2) (name A0) (type 3state))
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(pin (num 3) (name A1) (type 3state))
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(pin (num 4) (name A2) (type 3state))
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(pin (num 5) (name A3) (type 3state))
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(pin (num 6) (name A4) (type 3state))
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(pin (num 7) (name A5) (type 3state))
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(pin (num 8) (name A6) (type 3state))
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(pin (num 9) (name A7) (type 3state))
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(pin (num 10) (name GND) (type power_in))
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(pin (num 11) (name B7) (type 3state))
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(pin (num 12) (name B6) (type 3state))
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(pin (num 13) (name B5) (type 3state))
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(pin (num 14) (name B4) (type 3state))
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(pin (num 15) (name B3) (type 3state))
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(pin (num 16) (name B2) (type 3state))
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(pin (num 17) (name B1) (type 3state))
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(pin (num 18) (name B0) (type 3state))
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(pin (num 19) (name CE) (type input))
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(pin (num 20) (name VCC) (type power_in))))
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(libpart (lib 74xx) (part 74LS32)
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(description "Quad 2-input OR")
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(docs http://www.ti.com/lit/gpn/sn74LS32)
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(footprints
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(fp DIP?14*))
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(fields
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(field (name Reference) U)
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(field (name Value) 74LS32))
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(pins
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(pin (num 1) (name ~) (type input))
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(pin (num 2) (name ~) (type input))
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(pin (num 3) (name ~) (type output))
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(pin (num 4) (name ~) (type input))
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(pin (num 5) (name ~) (type input))
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(pin (num 6) (name ~) (type output))
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(pin (num 7) (name GND) (type power_in))
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(pin (num 8) (name ~) (type output))
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(pin (num 9) (name ~) (type input))
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(pin (num 10) (name ~) (type input))
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(pin (num 11) (name ~) (type output))
|
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(pin (num 12) (name ~) (type input))
|
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(pin (num 13) (name ~) (type input))
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(pin (num 14) (name VCC) (type power_in))))
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(libpart (lib 74xx) (part 74LS374)
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(aliases
|
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(alias 74HC374)
|
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(alias 74HCT374)
|
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(alias 74AHC374)
|
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(alias 74AHCT374))
|
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(description "8-bit Register, 3-state outputs")
|
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(docs http://www.ti.com/lit/gpn/sn74LS374)
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(footprints
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(fp DIP?20*)
|
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(fp SOIC?20*)
|
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(fp SO?20*))
|
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(fields
|
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(field (name Reference) U)
|
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(field (name Value) 74LS374))
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(pins
|
||||
(pin (num 1) (name OE) (type input))
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(pin (num 2) (name O0) (type 3state))
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(pin (num 3) (name D0) (type input))
|
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(pin (num 4) (name D1) (type input))
|
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(pin (num 5) (name O1) (type 3state))
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(pin (num 6) (name O2) (type 3state))
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(pin (num 7) (name D2) (type input))
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(pin (num 8) (name D3) (type input))
|
||||
(pin (num 9) (name O3) (type 3state))
|
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(pin (num 10) (name GND) (type power_in))
|
||||
(pin (num 11) (name Cp) (type input))
|
||||
(pin (num 12) (name O4) (type 3state))
|
||||
(pin (num 13) (name D4) (type input))
|
||||
(pin (num 14) (name D5) (type input))
|
||||
(pin (num 15) (name O5) (type 3state))
|
||||
(pin (num 16) (name O6) (type 3state))
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||||
(pin (num 17) (name D6) (type input))
|
||||
(pin (num 18) (name D7) (type input))
|
||||
(pin (num 19) (name O7) (type 3state))
|
||||
(pin (num 20) (name VCC) (type power_in))))
|
||||
(libpart (lib Connector) (part Raspberry_Pi_2_3)
|
||||
(description "expansion header for Raspberry Pi 2 & 3")
|
||||
(docs https://www.raspberrypi.org/documentation/hardware/raspberrypi/schematics/rpi_SCH_3bplus_1p0_reduced.pdf)
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||||
(footprints
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||||
(fp PinHeader*2x20*P2.54mm*Vertical*)
|
||||
(fp PinSocket*2x20*P2.54mm*Vertical*))
|
||||
(fields
|
||||
(field (name Reference) J)
|
||||
(field (name Value) Raspberry_Pi_2_3))
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(pins
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||||
(pin (num 1) (name 3V3) (type power_in))
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||||
(pin (num 2) (name 5V) (type power_in))
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||||
(pin (num 3) (name SDA/GPIO2) (type BiDi))
|
||||
(pin (num 4) (name 5V) (type power_in))
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||||
(pin (num 5) (name SCL/GPIO3) (type BiDi))
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||||
(pin (num 6) (name GND) (type power_in))
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||||
(pin (num 7) (name GCLK0/GPIO4) (type BiDi))
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||||
(pin (num 8) (name GPIO14/TXD) (type BiDi))
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||||
(pin (num 9) (name GND) (type power_in))
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||||
(pin (num 10) (name GPIO15/RXD) (type BiDi))
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||||
(pin (num 11) (name GPIO17) (type BiDi))
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||||
(pin (num 12) (name GPIO18/PWM0) (type BiDi))
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||||
(pin (num 13) (name GPIO27) (type BiDi))
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||||
(pin (num 14) (name GND) (type power_in))
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||||
(pin (num 15) (name GPIO22) (type BiDi))
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||||
(pin (num 16) (name GPIO23) (type BiDi))
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||||
(pin (num 17) (name 3V3) (type power_in))
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||||
(pin (num 18) (name GPIO24) (type BiDi))
|
||||
(pin (num 19) (name MOSI0/GPIO10) (type BiDi))
|
||||
(pin (num 20) (name GND) (type power_in))
|
||||
(pin (num 21) (name MISO0/GPIO9) (type BiDi))
|
||||
(pin (num 22) (name GPIO25) (type BiDi))
|
||||
(pin (num 23) (name SCLK0/GPIO11) (type BiDi))
|
||||
(pin (num 24) (name ~CE0~/GPIO8) (type BiDi))
|
||||
(pin (num 25) (name GND) (type power_in))
|
||||
(pin (num 26) (name ~CE1~/GPIO7) (type BiDi))
|
||||
(pin (num 27) (name ID_SD/GPIO0) (type BiDi))
|
||||
(pin (num 28) (name ID_SC/GPIO1) (type BiDi))
|
||||
(pin (num 29) (name GCLK1/GPIO5) (type BiDi))
|
||||
(pin (num 30) (name GND) (type power_in))
|
||||
(pin (num 31) (name GCLK2/GPIO6) (type BiDi))
|
||||
(pin (num 32) (name PWM0/GPIO12) (type BiDi))
|
||||
(pin (num 33) (name PWM1/GPIO13) (type BiDi))
|
||||
(pin (num 34) (name GND) (type power_in))
|
||||
(pin (num 35) (name GPIO19/MISO1) (type BiDi))
|
||||
(pin (num 36) (name GPIO16) (type BiDi))
|
||||
(pin (num 37) (name GPIO26) (type BiDi))
|
||||
(pin (num 38) (name GPIO20/MOSI1) (type BiDi))
|
||||
(pin (num 39) (name GND) (type power_in))
|
||||
(pin (num 40) (name GPIO21/SCLK1) (type BiDi))))
|
||||
(libpart (lib Connector_Generic) (part Conn_02x25_Counter_Clockwise)
|
||||
(description "Generic connector, double row, 02x25, counter clockwise pin numbering scheme (similar to DIP packge numbering), script generated (kicad-library-utils/schlib/autogen/connector/)")
|
||||
(docs ~)
|
||||
(footprints
|
||||
(fp Connector*:*_2x??_*))
|
||||
(fields
|
||||
(field (name Reference) J)
|
||||
(field (name Value) Conn_02x25_Counter_Clockwise))
|
||||
(pins
|
||||
(pin (num 1) (name Pin_1) (type passive))
|
||||
(pin (num 2) (name Pin_2) (type passive))
|
||||
(pin (num 3) (name Pin_3) (type passive))
|
||||
(pin (num 4) (name Pin_4) (type passive))
|
||||
(pin (num 5) (name Pin_5) (type passive))
|
||||
(pin (num 6) (name Pin_6) (type passive))
|
||||
(pin (num 7) (name Pin_7) (type passive))
|
||||
(pin (num 8) (name Pin_8) (type passive))
|
||||
(pin (num 9) (name Pin_9) (type passive))
|
||||
(pin (num 10) (name Pin_10) (type passive))
|
||||
(pin (num 11) (name Pin_11) (type passive))
|
||||
(pin (num 12) (name Pin_12) (type passive))
|
||||
(pin (num 13) (name Pin_13) (type passive))
|
||||
(pin (num 14) (name Pin_14) (type passive))
|
||||
(pin (num 15) (name Pin_15) (type passive))
|
||||
(pin (num 16) (name Pin_16) (type passive))
|
||||
(pin (num 17) (name Pin_17) (type passive))
|
||||
(pin (num 18) (name Pin_18) (type passive))
|
||||
(pin (num 19) (name Pin_19) (type passive))
|
||||
(pin (num 20) (name Pin_20) (type passive))
|
||||
(pin (num 21) (name Pin_21) (type passive))
|
||||
(pin (num 22) (name Pin_22) (type passive))
|
||||
(pin (num 23) (name Pin_23) (type passive))
|
||||
(pin (num 24) (name Pin_24) (type passive))
|
||||
(pin (num 25) (name Pin_25) (type passive))
|
||||
(pin (num 26) (name Pin_26) (type passive))
|
||||
(pin (num 27) (name Pin_27) (type passive))
|
||||
(pin (num 28) (name Pin_28) (type passive))
|
||||
(pin (num 29) (name Pin_29) (type passive))
|
||||
(pin (num 30) (name Pin_30) (type passive))
|
||||
(pin (num 31) (name Pin_31) (type passive))
|
||||
(pin (num 32) (name Pin_32) (type passive))
|
||||
(pin (num 33) (name Pin_33) (type passive))
|
||||
(pin (num 34) (name Pin_34) (type passive))
|
||||
(pin (num 35) (name Pin_35) (type passive))
|
||||
(pin (num 36) (name Pin_36) (type passive))
|
||||
(pin (num 37) (name Pin_37) (type passive))
|
||||
(pin (num 38) (name Pin_38) (type passive))
|
||||
(pin (num 39) (name Pin_39) (type passive))
|
||||
(pin (num 40) (name Pin_40) (type passive))
|
||||
(pin (num 41) (name Pin_41) (type passive))
|
||||
(pin (num 42) (name Pin_42) (type passive))
|
||||
(pin (num 43) (name Pin_43) (type passive))
|
||||
(pin (num 44) (name Pin_44) (type passive))
|
||||
(pin (num 45) (name Pin_45) (type passive))
|
||||
(pin (num 46) (name Pin_46) (type passive))
|
||||
(pin (num 47) (name Pin_47) (type passive))
|
||||
(pin (num 48) (name Pin_48) (type passive))
|
||||
(pin (num 49) (name Pin_49) (type passive))
|
||||
(pin (num 50) (name Pin_50) (type passive))))
|
||||
(libpart (lib Device) (part R)
|
||||
(description Resistor)
|
||||
(docs ~)
|
||||
(footprints
|
||||
(fp R_*))
|
||||
(fields
|
||||
(field (name Reference) R)
|
||||
(field (name Value) R))
|
||||
(pins
|
||||
(pin (num 1) (name ~) (type passive))
|
||||
(pin (num 2) (name ~) (type passive))))
|
||||
(libpart (lib Memory_EPROM) (part 27C64)
|
||||
(aliases
|
||||
(alias 2764))
|
||||
(description "OTP EPROM 64 KiBit, [Obsolete 2004-01]")
|
||||
(docs http://ww1.microchip.com/downloads/en/DeviceDoc/11107M.pdf)
|
||||
(footprints
|
||||
(fp DIP*W15.24mm*))
|
||||
(fields
|
||||
(field (name Reference) U)
|
||||
(field (name Value) 27C64)
|
||||
(field (name Footprint) Package_DIP:DIP-28_W15.24mm))
|
||||
(pins
|
||||
(pin (num 1) (name VPP) (type input))
|
||||
(pin (num 2) (name A12) (type input))
|
||||
(pin (num 3) (name A7) (type input))
|
||||
(pin (num 4) (name A6) (type input))
|
||||
(pin (num 5) (name A5) (type input))
|
||||
(pin (num 6) (name A4) (type input))
|
||||
(pin (num 7) (name A3) (type input))
|
||||
(pin (num 8) (name A2) (type input))
|
||||
(pin (num 9) (name A1) (type input))
|
||||
(pin (num 10) (name A0) (type input))
|
||||
(pin (num 11) (name D0) (type 3state))
|
||||
(pin (num 12) (name D1) (type 3state))
|
||||
(pin (num 13) (name D2) (type 3state))
|
||||
(pin (num 14) (name GND) (type power_in))
|
||||
(pin (num 15) (name D3) (type 3state))
|
||||
(pin (num 16) (name D4) (type 3state))
|
||||
(pin (num 17) (name D5) (type 3state))
|
||||
(pin (num 18) (name D6) (type 3state))
|
||||
(pin (num 19) (name D7) (type 3state))
|
||||
(pin (num 20) (name ~CE) (type input))
|
||||
(pin (num 21) (name A10) (type input))
|
||||
(pin (num 22) (name ~OE) (type input))
|
||||
(pin (num 23) (name A11) (type input))
|
||||
(pin (num 24) (name A9) (type input))
|
||||
(pin (num 25) (name A8) (type input))
|
||||
(pin (num 26) (name NC) (type NotConnected))
|
||||
(pin (num 27) (name ~PGM) (type input))
|
||||
(pin (num 28) (name VCC) (type power_in)))))
|
||||
(libraries
|
||||
(library (logical 74xx)
|
||||
(uri /usr/share/kicad/library/74xx.lib))
|
||||
(library (logical Connector)
|
||||
(uri /usr/share/kicad/library/Connector.lib))
|
||||
(library (logical Connector_Generic)
|
||||
(uri /usr/share/kicad/library/Connector_Generic.lib))
|
||||
(library (logical Device)
|
||||
(uri /usr/share/kicad/library/Device.lib))
|
||||
(library (logical Memory_EPROM)
|
||||
(uri /usr/share/kicad/library/Memory_EPROM.lib)))
|
||||
(nets
|
||||
(net (code 1) (name "Net-(J1-Pad38)")
|
||||
(node (ref RA1) (pin 1))
|
||||
(node (ref J1) (pin 38))
|
||||
(node (ref U5) (pin 15))
|
||||
(node (ref R2) (pin 2)))
|
||||
(net (code 2) (name "Net-(J1-Pad35)")
|
||||
(node (ref J1) (pin 35))
|
||||
(node (ref U5) (pin 6))
|
||||
(node (ref RD1) (pin 1))
|
||||
(node (ref R5) (pin 2)))
|
||||
(net (code 3) (name "Net-(J1-Pad32)")
|
||||
(node (ref U5) (pin 19))
|
||||
(node (ref R0) (pin 2))
|
||||
(node (ref R8) (pin 1))
|
||||
(node (ref J1) (pin 32)))
|
||||
(net (code 4) (name "Net-(J1-Pad36)")
|
||||
(node (ref R1) (pin 2))
|
||||
(node (ref J1) (pin 36))
|
||||
(node (ref R9) (pin 1))
|
||||
(node (ref U5) (pin 16)))
|
||||
(net (code 5) (name "Net-(J1-Pad15)")
|
||||
(node (ref U4) (pin 15))
|
||||
(node (ref J1) (pin 15)))
|
||||
(net (code 6) (name "Net-(J1-Pad7)")
|
||||
(node (ref J1) (pin 7))
|
||||
(node (ref U4) (pin 18)))
|
||||
(net (code 7) (name "Net-(J1-Pad11)")
|
||||
(node (ref J1) (pin 11))
|
||||
(node (ref U4) (pin 17)))
|
||||
(net (code 8) (name "Net-(J1-Pad13)")
|
||||
(node (ref J1) (pin 13))
|
||||
(node (ref U4) (pin 16)))
|
||||
(net (code 9) (name "Net-(J1-Pad19)")
|
||||
(node (ref J1) (pin 19))
|
||||
(node (ref U4) (pin 14)))
|
||||
(net (code 10) (name "Net-(J1-Pad21)")
|
||||
(node (ref U4) (pin 13))
|
||||
(node (ref J1) (pin 21)))
|
||||
(net (code 11) (name "Net-(J1-Pad33)")
|
||||
(node (ref J1) (pin 33))
|
||||
(node (ref RE1) (pin 1))
|
||||
(node (ref R6) (pin 2))
|
||||
(node (ref U5) (pin 5)))
|
||||
(net (code 12) (name "Net-(J1-Pad37)")
|
||||
(node (ref J1) (pin 37))
|
||||
(node (ref RC1) (pin 1))
|
||||
(node (ref R4) (pin 2))
|
||||
(node (ref U5) (pin 9)))
|
||||
(net (code 13) (name "Net-(J1-Pad29)")
|
||||
(node (ref J1) (pin 29))
|
||||
(node (ref U4) (pin 11)))
|
||||
(net (code 14) (name "Net-(J1-Pad23)")
|
||||
(node (ref J1) (pin 23))
|
||||
(node (ref U4) (pin 12)))
|
||||
(net (code 15) (name "Net-(J1-Pad31)")
|
||||
(node (ref RF1) (pin 1))
|
||||
(node (ref U5) (pin 2))
|
||||
(node (ref R7) (pin 2))
|
||||
(node (ref J1) (pin 31)))
|
||||
(net (code 16) (name "Net-(J1-Pad24)")
|
||||
(node (ref J1) (pin 24))
|
||||
(node (ref U3) (pin 8))
|
||||
(node (ref U5) (pin 11)))
|
||||
(net (code 17) (name "Net-(U2-Pad3)")
|
||||
(node (ref U2) (pin 5))
|
||||
(node (ref U2) (pin 4))
|
||||
(node (ref U2) (pin 3)))
|
||||
(net (code 18) (name "Net-(U3-Pad10)")
|
||||
(node (ref U3) (pin 10))
|
||||
(node (ref U3) (pin 11)))
|
||||
(net (code 19) (name "Net-(J0-Pad41)")
|
||||
(node (ref J0) (pin 41))
|
||||
(node (ref U3) (pin 2))
|
||||
(node (ref U3) (pin 9))
|
||||
(node (ref U2) (pin 1)))
|
||||
(net (code 20) (name "Net-(U2-Pad8)")
|
||||
(node (ref U3) (pin 12))
|
||||
(node (ref U2) (pin 8)))
|
||||
(net (code 21) (name "Net-(U0-Pad19)")
|
||||
(node (ref U0) (pin 19))
|
||||
(node (ref U2) (pin 6)))
|
||||
(net (code 22) (name "Net-(J1-Pad40)")
|
||||
(node (ref R3) (pin 2))
|
||||
(node (ref RB1) (pin 1))
|
||||
(node (ref U5) (pin 12))
|
||||
(node (ref J1) (pin 40)))
|
||||
(net (code 23) (name "Net-(U0-Pad1)")
|
||||
(node (ref U3) (pin 4))
|
||||
(node (ref U2) (pin 9))
|
||||
(node (ref U2) (pin 10))
|
||||
(node (ref U2) (pin 11))
|
||||
(node (ref U0) (pin 1)))
|
||||
(net (code 24) (name "Net-(J1-Pad26)")
|
||||
(node (ref U4) (pin 19))
|
||||
(node (ref U3) (pin 3))
|
||||
(node (ref J1) (pin 26)))
|
||||
(net (code 25) (name "Net-(U3-Pad1)")
|
||||
(node (ref U3) (pin 6))
|
||||
(node (ref U3) (pin 1)))
|
||||
(net (code 26) (name "Net-(J0-Pad18)")
|
||||
(node (ref J0) (pin 18))
|
||||
(node (ref U2) (pin 12))
|
||||
(node (ref U2) (pin 13)))
|
||||
(net (code 27) (name "Net-(U0-Pad11)")
|
||||
(node (ref U5) (pin 18))
|
||||
(node (ref U1) (pin 19))
|
||||
(node (ref U0) (pin 11))
|
||||
(node (ref U4) (pin 9)))
|
||||
(net (code 28) (name "Net-(J1-Pad1)")
|
||||
(node (ref J1) (pin 1)))
|
||||
(net (code 29) (name "Net-(J1-Pad10)")
|
||||
(node (ref J1) (pin 10)))
|
||||
(net (code 30) (name "Net-(J1-Pad12)")
|
||||
(node (ref J1) (pin 12)))
|
||||
(net (code 31) (name "Net-(U0-Pad15)")
|
||||
(node (ref U1) (pin 15))
|
||||
(node (ref U5) (pin 8))
|
||||
(node (ref U0) (pin 15))
|
||||
(node (ref U4) (pin 5)))
|
||||
(net (code 32) (name "Net-(J0-Pad26)")
|
||||
(node (ref J1) (pin 6))
|
||||
(node (ref U4) (pin 10))
|
||||
(node (ref U4) (pin 1))
|
||||
(node (ref J1) (pin 14))
|
||||
(node (ref J1) (pin 34))
|
||||
(node (ref U5) (pin 10))
|
||||
(node (ref U1) (pin 14))
|
||||
(node (ref J0) (pin 26))
|
||||
(node (ref J1) (pin 30))
|
||||
(node (ref J1) (pin 25))
|
||||
(node (ref R8) (pin 2))
|
||||
(node (ref J1) (pin 20))
|
||||
(node (ref R9) (pin 2))
|
||||
(node (ref RA1) (pin 2))
|
||||
(node (ref RB1) (pin 2))
|
||||
(node (ref RC1) (pin 2))
|
||||
(node (ref U5) (pin 1))
|
||||
(node (ref J1) (pin 9))
|
||||
(node (ref RD1) (pin 2))
|
||||
(node (ref RE1) (pin 2))
|
||||
(node (ref RF1) (pin 2))
|
||||
(node (ref J1) (pin 39))
|
||||
(node (ref U0) (pin 10))
|
||||
(node (ref U2) (pin 7))
|
||||
(node (ref U3) (pin 7)))
|
||||
(net (code 33) (name "Net-(J1-Pad5)")
|
||||
(node (ref J1) (pin 5)))
|
||||
(net (code 34) (name "Net-(J1-Pad8)")
|
||||
(node (ref J1) (pin 8)))
|
||||
(net (code 35) (name "Net-(U0-Pad13)")
|
||||
(node (ref U0) (pin 13))
|
||||
(node (ref U5) (pin 14))
|
||||
(node (ref U1) (pin 17))
|
||||
(node (ref U4) (pin 7)))
|
||||
(net (code 36) (name "Net-(J1-Pad16)")
|
||||
(node (ref J1) (pin 16)))
|
||||
(net (code 37) (name "Net-(J1-Pad17)")
|
||||
(node (ref J1) (pin 17)))
|
||||
(net (code 38) (name "Net-(J1-Pad18)")
|
||||
(node (ref J1) (pin 18)))
|
||||
(net (code 39) (name "Net-(J1-Pad22)")
|
||||
(node (ref J1) (pin 22)))
|
||||
(net (code 40) (name "Net-(J1-Pad27)")
|
||||
(node (ref J1) (pin 27)))
|
||||
(net (code 41) (name "Net-(J1-Pad28)")
|
||||
(node (ref J1) (pin 28)))
|
||||
(net (code 42) (name "Net-(J1-Pad3)")
|
||||
(node (ref J1) (pin 3)))
|
||||
(net (code 43) (name "Net-(J0-Pad38)")
|
||||
(node (ref J0) (pin 38)))
|
||||
(net (code 44) (name "Net-(J0-Pad29)")
|
||||
(node (ref J0) (pin 29)))
|
||||
(net (code 45) (name "Net-(J0-Pad3)")
|
||||
(node (ref J0) (pin 3))
|
||||
(node (ref U3) (pin 13))
|
||||
(node (ref U1) (pin 9)))
|
||||
(net (code 46) (name "Net-(J0-Pad30)")
|
||||
(node (ref J0) (pin 30)))
|
||||
(net (code 47) (name "Net-(J0-Pad31)")
|
||||
(node (ref J0) (pin 31)))
|
||||
(net (code 48) (name "Net-(J0-Pad32)")
|
||||
(node (ref J0) (pin 32)))
|
||||
(net (code 49) (name "Net-(J0-Pad33)")
|
||||
(node (ref J0) (pin 33)))
|
||||
(net (code 50) (name "Net-(J0-Pad34)")
|
||||
(node (ref J0) (pin 34)))
|
||||
(net (code 51) (name "Net-(J0-Pad35)")
|
||||
(node (ref J0) (pin 35)))
|
||||
(net (code 52) (name "Net-(J0-Pad36)")
|
||||
(node (ref J0) (pin 36)))
|
||||
(net (code 53) (name "Net-(J0-Pad37)")
|
||||
(node (ref J0) (pin 37)))
|
||||
(net (code 54) (name "Net-(J0-Pad28)")
|
||||
(node (ref J0) (pin 28)))
|
||||
(net (code 55) (name "Net-(J0-Pad39)")
|
||||
(node (ref J0) (pin 39)))
|
||||
(net (code 56) (name "Net-(J0-Pad40)")
|
||||
(node (ref J0) (pin 40)))
|
||||
(net (code 57) (name "Net-(J0-Pad42)")
|
||||
(node (ref U0) (pin 9))
|
||||
(node (ref J0) (pin 42)))
|
||||
(net (code 58) (name "Net-(J0-Pad43)")
|
||||
(node (ref U0) (pin 8))
|
||||
(node (ref J0) (pin 43)))
|
||||
(net (code 59) (name "Net-(J0-Pad44)")
|
||||
(node (ref U0) (pin 7))
|
||||
(node (ref J0) (pin 44)))
|
||||
(net (code 60) (name "Net-(J0-Pad45)")
|
||||
(node (ref J0) (pin 45))
|
||||
(node (ref U0) (pin 6)))
|
||||
(net (code 61) (name "Net-(J0-Pad46)")
|
||||
(node (ref J0) (pin 46))
|
||||
(node (ref U0) (pin 5)))
|
||||
(net (code 62) (name "Net-(J0-Pad19)")
|
||||
(node (ref J0) (pin 19)))
|
||||
(net (code 63) (name "Net-(J0-Pad11)")
|
||||
(node (ref J0) (pin 11))
|
||||
(node (ref U1) (pin 24)))
|
||||
(net (code 64) (name "Net-(J0-Pad13)")
|
||||
(node (ref J0) (pin 13)))
|
||||
(net (code 65) (name "Net-(J0-Pad14)")
|
||||
(node (ref J0) (pin 14)))
|
||||
(net (code 66) (name "Net-(J0-Pad15)")
|
||||
(node (ref J0) (pin 15)))
|
||||
(net (code 67) (name "Net-(J0-Pad16)")
|
||||
(node (ref J0) (pin 16)))
|
||||
(net (code 68) (name "Net-(J0-Pad17)")
|
||||
(node (ref J0) (pin 17)))
|
||||
(net (code 69) (name "Net-(J0-Pad47)")
|
||||
(node (ref J0) (pin 47))
|
||||
(node (ref U0) (pin 4)))
|
||||
(net (code 70) (name "Net-(J0-Pad20)")
|
||||
(node (ref J0) (pin 20)))
|
||||
(net (code 71) (name "Net-(J0-Pad21)")
|
||||
(node (ref J0) (pin 21)))
|
||||
(net (code 72) (name "Net-(J0-Pad22)")
|
||||
(node (ref J0) (pin 22)))
|
||||
(net (code 73) (name "Net-(J0-Pad23)")
|
||||
(node (ref J0) (pin 23)))
|
||||
(net (code 74) (name "Net-(J0-Pad24)")
|
||||
(node (ref J0) (pin 24)))
|
||||
(net (code 75) (name "Net-(J0-Pad25)")
|
||||
(node (ref R7) (pin 1))
|
||||
(node (ref U1) (pin 1))
|
||||
(node (ref U3) (pin 14))
|
||||
(node (ref U2) (pin 14))
|
||||
(node (ref R2) (pin 1))
|
||||
(node (ref J1) (pin 2))
|
||||
(node (ref J1) (pin 4))
|
||||
(node (ref R0) (pin 1))
|
||||
(node (ref U0) (pin 20))
|
||||
(node (ref U4) (pin 20))
|
||||
(node (ref J0) (pin 25))
|
||||
(node (ref R5) (pin 1))
|
||||
(node (ref R6) (pin 1))
|
||||
(node (ref R4) (pin 1))
|
||||
(node (ref U1) (pin 27))
|
||||
(node (ref R1) (pin 1))
|
||||
(node (ref U1) (pin 28))
|
||||
(node (ref U5) (pin 20))
|
||||
(node (ref R3) (pin 1)))
|
||||
(net (code 76) (name "Net-(J0-Pad27)")
|
||||
(node (ref J0) (pin 27)))
|
||||
(net (code 77) (name "Net-(U1-Pad26)")
|
||||
(node (ref U1) (pin 26)))
|
||||
(net (code 78) (name "Net-(J0-Pad12)")
|
||||
(node (ref U1) (pin 21))
|
||||
(node (ref J0) (pin 12)))
|
||||
(net (code 79) (name "Net-(J0-Pad1)")
|
||||
(node (ref J0) (pin 1))
|
||||
(node (ref U1) (pin 20))
|
||||
(node (ref U1) (pin 22))
|
||||
(node (ref U2) (pin 2)))
|
||||
(net (code 80) (name "Net-(U0-Pad16)")
|
||||
(node (ref U4) (pin 4))
|
||||
(node (ref U0) (pin 16))
|
||||
(node (ref U5) (pin 7))
|
||||
(node (ref U1) (pin 13)))
|
||||
(net (code 81) (name "Net-(U1-Pad23)")
|
||||
(node (ref U1) (pin 23)))
|
||||
(net (code 82) (name "Net-(J0-Pad10)")
|
||||
(node (ref J0) (pin 10))
|
||||
(node (ref U1) (pin 25)))
|
||||
(net (code 83) (name "Net-(U0-Pad14)")
|
||||
(node (ref U0) (pin 14))
|
||||
(node (ref U4) (pin 6))
|
||||
(node (ref U5) (pin 13))
|
||||
(node (ref U1) (pin 16)))
|
||||
(net (code 84) (name "Net-(U0-Pad12)")
|
||||
(node (ref U0) (pin 12))
|
||||
(node (ref U1) (pin 18))
|
||||
(node (ref U5) (pin 17))
|
||||
(node (ref U4) (pin 8)))
|
||||
(net (code 85) (name "Net-(U1-Pad2)")
|
||||
(node (ref U1) (pin 2)))
|
||||
(net (code 86) (name "Net-(J0-Pad48)")
|
||||
(node (ref J0) (pin 48))
|
||||
(node (ref U0) (pin 3)))
|
||||
(net (code 87) (name "Net-(J0-Pad49)")
|
||||
(node (ref J0) (pin 49))
|
||||
(node (ref U0) (pin 2)))
|
||||
(net (code 88) (name "Net-(J0-Pad50)")
|
||||
(node (ref J0) (pin 50)))
|
||||
(net (code 89) (name "Net-(J0-Pad6)")
|
||||
(node (ref U1) (pin 6))
|
||||
(node (ref J0) (pin 6)))
|
||||
(net (code 90) (name "Net-(J0-Pad8)")
|
||||
(node (ref J0) (pin 8))
|
||||
(node (ref U1) (pin 4)))
|
||||
(net (code 91) (name "Net-(J0-Pad9)")
|
||||
(node (ref U1) (pin 3))
|
||||
(node (ref J0) (pin 9)))
|
||||
(net (code 92) (name "Net-(J0-Pad7)")
|
||||
(node (ref U1) (pin 5))
|
||||
(node (ref J0) (pin 7)))
|
||||
(net (code 93) (name "Net-(J0-Pad4)")
|
||||
(node (ref U1) (pin 8))
|
||||
(node (ref J0) (pin 4)))
|
||||
(net (code 94) (name "Net-(J0-Pad2)")
|
||||
(node (ref J0) (pin 2))
|
||||
(node (ref U3) (pin 5))
|
||||
(node (ref U1) (pin 10)))
|
||||
(net (code 95) (name "Net-(J0-Pad5)")
|
||||
(node (ref J0) (pin 5))
|
||||
(node (ref U1) (pin 7)))
|
||||
(net (code 96) (name "Net-(U0-Pad18)")
|
||||
(node (ref U4) (pin 2))
|
||||
(node (ref U5) (pin 3))
|
||||
(node (ref U0) (pin 18))
|
||||
(node (ref U1) (pin 11)))
|
||||
(net (code 97) (name "Net-(U0-Pad17)")
|
||||
(node (ref U4) (pin 3))
|
||||
(node (ref U0) (pin 17))
|
||||
(node (ref U5) (pin 4))
|
||||
(node (ref U1) (pin 12)))))
|
||||
Binary file not shown.
@ -1,29 +1,10 @@
|
||||
update=22/05/2015 07:44:53
|
||||
update=Thu 12 Nov 2020 09:17:33 PM
|
||||
version=1
|
||||
last_client=kicad
|
||||
[general]
|
||||
version=1
|
||||
RootSch=
|
||||
BoardNm=
|
||||
[pcbnew]
|
||||
version=1
|
||||
LastNetListRead=
|
||||
UseCmpFile=1
|
||||
PadDrill=0.600000000000
|
||||
PadDrillOvalY=0.600000000000
|
||||
PadSizeH=1.500000000000
|
||||
PadSizeV=1.500000000000
|
||||
PcbTextSizeV=1.500000000000
|
||||
PcbTextSizeH=1.500000000000
|
||||
PcbTextThickness=0.300000000000
|
||||
ModuleTextSizeV=1.000000000000
|
||||
ModuleTextSizeH=1.000000000000
|
||||
ModuleTextSizeThickness=0.150000000000
|
||||
SolderMaskClearance=0.000000000000
|
||||
SolderMaskMinWidth=0.000000000000
|
||||
DrawSegmentWidth=0.200000000000
|
||||
BoardOutlineThickness=0.100000000000
|
||||
ModuleOutlineThickness=0.150000000000
|
||||
[cvpcb]
|
||||
version=1
|
||||
NetIExt=net
|
||||
@ -31,3 +12,237 @@ NetIExt=net
|
||||
version=1
|
||||
LibDir=
|
||||
[eeschema/libraries]
|
||||
[schematic_editor]
|
||||
version=1
|
||||
PageLayoutDescrFile=
|
||||
PlotDirectoryName=/home/terence/source/Apple2-IO-RPi/Hardware/
|
||||
SubpartIdSeparator=0
|
||||
SubpartFirstId=65
|
||||
NetFmtName=Pcbnew
|
||||
SpiceAjustPassiveValues=0
|
||||
LabSize=50
|
||||
ERC_TestSimilarLabels=1
|
||||
[pcbnew]
|
||||
version=1
|
||||
PageLayoutDescrFile=
|
||||
LastNetListRead=Apple2IORPi.net
|
||||
CopperLayerCount=2
|
||||
BoardThickness=1.6
|
||||
AllowMicroVias=0
|
||||
AllowBlindVias=0
|
||||
RequireCourtyardDefinitions=0
|
||||
ProhibitOverlappingCourtyards=1
|
||||
MinTrackWidth=0.2
|
||||
MinViaDiameter=0.4
|
||||
MinViaDrill=0.3
|
||||
MinMicroViaDiameter=0.2
|
||||
MinMicroViaDrill=0.09999999999999999
|
||||
MinHoleToHole=0.25
|
||||
TrackWidth1=0.25
|
||||
ViaDiameter1=0.8
|
||||
ViaDrill1=0.4
|
||||
dPairWidth1=0.2
|
||||
dPairGap1=0.25
|
||||
dPairViaGap1=0.25
|
||||
SilkLineWidth=0.12
|
||||
SilkTextSizeV=1
|
||||
SilkTextSizeH=1
|
||||
SilkTextSizeThickness=0.15
|
||||
SilkTextItalic=0
|
||||
SilkTextUpright=1
|
||||
CopperLineWidth=0.2
|
||||
CopperTextSizeV=1.5
|
||||
CopperTextSizeH=1.5
|
||||
CopperTextThickness=0.3
|
||||
CopperTextItalic=0
|
||||
CopperTextUpright=1
|
||||
EdgeCutLineWidth=0.05
|
||||
CourtyardLineWidth=0.05
|
||||
OthersLineWidth=0.15
|
||||
OthersTextSizeV=1
|
||||
OthersTextSizeH=1
|
||||
OthersTextSizeThickness=0.15
|
||||
OthersTextItalic=0
|
||||
OthersTextUpright=1
|
||||
SolderMaskClearance=0.051
|
||||
SolderMaskMinWidth=0.25
|
||||
SolderPasteClearance=0
|
||||
SolderPasteRatio=0
|
||||
[pcbnew/Layer.F.Cu]
|
||||
Name=F.Cu
|
||||
Type=0
|
||||
Enabled=1
|
||||
[pcbnew/Layer.In1.Cu]
|
||||
Name=In1.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In2.Cu]
|
||||
Name=In2.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In3.Cu]
|
||||
Name=In3.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In4.Cu]
|
||||
Name=In4.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In5.Cu]
|
||||
Name=In5.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In6.Cu]
|
||||
Name=In6.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In7.Cu]
|
||||
Name=In7.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In8.Cu]
|
||||
Name=In8.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In9.Cu]
|
||||
Name=In9.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In10.Cu]
|
||||
Name=In10.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In11.Cu]
|
||||
Name=In11.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In12.Cu]
|
||||
Name=In12.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In13.Cu]
|
||||
Name=In13.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In14.Cu]
|
||||
Name=In14.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In15.Cu]
|
||||
Name=In15.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In16.Cu]
|
||||
Name=In16.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In17.Cu]
|
||||
Name=In17.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In18.Cu]
|
||||
Name=In18.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In19.Cu]
|
||||
Name=In19.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In20.Cu]
|
||||
Name=In20.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In21.Cu]
|
||||
Name=In21.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In22.Cu]
|
||||
Name=In22.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In23.Cu]
|
||||
Name=In23.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In24.Cu]
|
||||
Name=In24.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In25.Cu]
|
||||
Name=In25.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In26.Cu]
|
||||
Name=In26.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In27.Cu]
|
||||
Name=In27.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In28.Cu]
|
||||
Name=In28.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In29.Cu]
|
||||
Name=In29.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In30.Cu]
|
||||
Name=In30.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.B.Cu]
|
||||
Name=B.Cu
|
||||
Type=0
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Adhes]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Adhes]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Paste]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Paste]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.SilkS]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.SilkS]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Mask]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Mask]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Dwgs.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Cmts.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Eco1.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Eco2.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Edge.Cuts]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Margin]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.CrtYd]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.CrtYd]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Fab]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Fab]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Rescue]
|
||||
Enabled=1
|
||||
[pcbnew/Netclasses]
|
||||
[pcbnew/Netclasses/Default]
|
||||
Name=Default
|
||||
Clearance=0.2
|
||||
TrackWidth=0.25
|
||||
ViaDiameter=0.8
|
||||
ViaDrill=0.4
|
||||
uViaDiameter=0.3
|
||||
uViaDrill=0.1
|
||||
dPairWidth=0.2
|
||||
dPairGap=0.25
|
||||
dPairViaGap=0.25
|
||||
|
||||
@ -5,8 +5,8 @@ $Descr USLedger 17000 11000
|
||||
encoding utf-8
|
||||
Sheet 1 1
|
||||
Title "Apple II I/O RPi"
|
||||
Date "2020-11-02"
|
||||
Rev "0.1"
|
||||
Date "2020-11-12"
|
||||
Rev "0.4"
|
||||
Comp "Terence J. Boldt"
|
||||
Comment1 "Initial draft desgn"
|
||||
Comment2 "Provides storage and network for the Apple ]["
|
||||
@ -14,21 +14,21 @@ Comment3 "Raspberry Pi Zero W as a daughter board"
|
||||
Comment4 "Expansion card for Apple ][ computers"
|
||||
$EndDescr
|
||||
$Comp
|
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L Connector_Generic:Conn_02x25_Counter_Clockwise J?
|
||||
L Connector_Generic:Conn_02x25_Counter_Clockwise J0
|
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U 1 1 5FA0A8C3
|
||||
P 3000 2700
|
||||
F 0 "J?" H 3050 4117 50 0000 C CNN
|
||||
F 0 "J0" H 3050 4117 50 0000 C CNN
|
||||
F 1 "Apple II Expansion Bus" H 3050 4026 50 0000 C CNN
|
||||
F 2 "" H 3000 2700 50 0001 C CNN
|
||||
F 2 "Hardware:Apple II Expansion Edge Connector" H 3000 2700 50 0001 C CNN
|
||||
F 3 "~" H 3000 2700 50 0001 C CNN
|
||||
1 3000 2700
|
||||
1 0 0 -1
|
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$EndComp
|
||||
$Comp
|
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L Memory_EPROM:2764 U?
|
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L Memory_EPROM:2764 U1
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U 1 1 5FA0EF8B
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P 5950 6400
|
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F 0 "U?" H 5950 7581 50 0000 C CNN
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F 0 "U1" H 5950 7581 50 0000 C CNN
|
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F 1 "2764" H 5950 7490 50 0000 C CNN
|
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F 2 "Package_DIP:DIP-28_W15.24mm" H 5950 6400 50 0001 C CNN
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F 3 "https://downloads.reactivemicro.com/Electronics/ROM/2764%20EPROM.pdf" H 5950 6400 50 0001 C CNN
|
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@ -36,45 +36,45 @@ F 3 "https://downloads.reactivemicro.com/Electronics/ROM/2764%20EPROM.pdf" H 595
|
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1 0 0 -1
|
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$EndComp
|
||||
$Comp
|
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L 74xx:74LS245 U?
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L 74xx:74LS245 U0
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U 1 1 5FA15F43
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P 4850 2100
|
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F 0 "U?" H 4850 3081 50 0000 C CNN
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F 0 "U0" H 4850 3081 50 0000 C CNN
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F 1 "74LS245" H 4850 2990 50 0000 C CNN
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F 2 "" H 4850 2100 50 0001 C CNN
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F 2 "Package_DIP:DIP-20_W7.62mm" H 4850 2100 50 0001 C CNN
|
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F 3 "http://www.ti.com/lit/gpn/sn74LS245" H 4850 2100 50 0001 C CNN
|
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1 4850 2100
|
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1 0 0 -1
|
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$EndComp
|
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$Comp
|
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L 74xx:74LS245 U?
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L 74xx:74LS245 U4
|
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U 1 1 5FA19168
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P 9100 2100
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F 0 "U?" H 9100 3081 50 0000 C CNN
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F 0 "U4" H 9100 3081 50 0000 C CNN
|
||||
F 1 "74LS245" H 9100 2990 50 0000 C CNN
|
||||
F 2 "" H 9100 2100 50 0001 C CNN
|
||||
F 2 "Package_DIP:DIP-20_W7.62mm" H 9100 2100 50 0001 C CNN
|
||||
F 3 "http://www.ti.com/lit/gpn/sn74LS245" H 9100 2100 50 0001 C CNN
|
||||
1 9100 2100
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L Connector:Raspberry_Pi_2_3 J?
|
||||
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||||
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||||
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||||
F 0 "J?" H 13050 4031 50 0000 C CNN
|
||||
F 0 "J1" H 13050 4031 50 0000 C CNN
|
||||
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|
||||
F 2 "" H 13050 2550 50 0001 C CNN
|
||||
F 2 "Connector_PinSocket_2.54mm:PinSocket_2x20_P2.54mm_Vertical" H 13050 2550 50 0001 C CNN
|
||||
F 3 "https://www.raspberrypi.org/documentation/hardware/raspberrypi/schematics/rpi_SCH_3bplus_1p0_reduced.pdf" H 13050 2550 50 0001 C CNN
|
||||
1 13050 2550
|
||||
1 0 0 -1
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||||
$EndComp
|
||||
$Comp
|
||||
L 74xx:74LS374 U?
|
||||
L 74xx:74LS374 U5
|
||||
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||||
P 9100 4100
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||||
F 0 "U?" H 9100 5081 50 0000 C CNN
|
||||
F 0 "U5" H 9100 5081 50 0000 C CNN
|
||||
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|
||||
F 2 "" H 9100 4100 50 0001 C CNN
|
||||
F 2 "Package_DIP:DIP-20_W7.62mm" H 9100 4100 50 0001 C CNN
|
||||
F 3 "http://www.ti.com/lit/gpn/sn74LS374" H 9100 4100 50 0001 C CNN
|
||||
1 9100 4100
|
||||
1 0 0 -1
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||||
@ -328,14 +328,14 @@ Connection ~ 5400 1300
|
||||
Wire Wire Line
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||||
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|
||||
Wire Wire Line
|
||||
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|
||||
5400 1300 5400 2450
|
||||
Connection ~ 5400 3300
|
||||
Wire Wire Line
|
||||
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|
||||
Wire Wire Line
|
||||
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|
||||
5950 7500 6450 7500
|
||||
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|
||||
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|
||||
8300 7500 8300 6350
|
||||
Wire Wire Line
|
||||
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|
||||
Connection ~ 5950 7500
|
||||
@ -359,7 +359,7 @@ Wire Wire Line
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||||
Connection ~ 12850 1250
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||||
Connection ~ 9100 1300
|
||||
Wire Wire Line
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||||
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||||
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|
||||
Wire Wire Line
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||||
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||||
Wire Wire Line
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||||
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||||
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||||
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||||
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||||
Wire Wire Line
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||||
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||||
Wire Wire Line
|
||||
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|
||||
Wire Wire Line
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||||
@ -455,8 +453,6 @@ Wire Wire Line
|
||||
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||||
Wire Wire Line
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||||
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||||
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|
||||
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||||
Wire Wire Line
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||||
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||||
Wire Wire Line
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||||
@ -514,183 +510,183 @@ Wire Wire Line
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||||
Wire Wire Line
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||||
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$Comp
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||||
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||||
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||||
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||||
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||||
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||||
F 3 "~" H 10050 5450 50 0001 C CNN
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||||
1 10050 5450
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||||
1 0 0 -1
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||||
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||||
$Comp
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||||
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||||
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||||
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|
||||
F 3 "~" H 10300 5450 50 0001 C CNN
|
||||
1 10300 5450
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||||
1 0 0 -1
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||||
$EndComp
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||||
$Comp
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||||
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||||
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||||
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||||
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||||
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||||
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||||
F 3 "~" H 10550 5450 50 0001 C CNN
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||||
1 10550 5450
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||||
$Comp
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||||
F 2 "" V 10730 5450 50 0001 C CNN
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||||
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||||
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||||
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|
||||
F 3 "~" H 10800 5450 50 0001 C CNN
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||||
1 10800 5450
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||||
1 0 0 -1
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$EndComp
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||||
$Comp
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||||
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||||
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||||
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||||
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|
||||
F 3 "~" H 11050 5450 50 0001 C CNN
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||||
1 11050 5450
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1 0 0 -1
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$EndComp
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$Comp
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||||
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||||
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||||
F 2 "Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical" V 11230 5450 50 0001 C CNN
|
||||
F 3 "~" H 11300 5450 50 0001 C CNN
|
||||
1 11300 5450
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||||
1 0 0 -1
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||||
$EndComp
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||||
$Comp
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||||
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||||
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F 0 "R?" H 11620 5496 50 0000 L CNN
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||||
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||||
F 2 "" V 11480 5450 50 0001 C CNN
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||||
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||||
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||||
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|
||||
F 3 "~" H 11550 5450 50 0001 C CNN
|
||||
1 11550 5450
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||||
1 0 0 -1
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$EndComp
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||||
$Comp
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||||
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||||
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F 0 "R?" H 11870 5496 50 0000 L CNN
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||||
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||||
F 2 "" V 11730 5450 50 0001 C CNN
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||||
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||||
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||||
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|
||||
F 3 "~" H 11800 5450 50 0001 C CNN
|
||||
1 11800 5450
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||||
1 0 0 -1
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||||
$EndComp
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||||
$Comp
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||||
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||||
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||||
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F 0 "R?" H 10120 4996 50 0000 L CNN
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F 2 "" V 9980 4950 50 0001 C CNN
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||||
F 0 "R0" H 10120 4996 50 0000 L CNN
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||||
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||||
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|
||||
F 3 "~" H 10050 4950 50 0001 C CNN
|
||||
1 10050 4950
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1 0 0 -1
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$EndComp
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||||
$Comp
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||||
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F 2 "" V 10230 4950 50 0001 C CNN
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||||
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||||
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||||
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|
||||
F 3 "~" H 10300 4950 50 0001 C CNN
|
||||
1 10300 4950
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||||
1 0 0 -1
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||||
$EndComp
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||||
$Comp
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||||
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F 2 "" V 10480 4950 50 0001 C CNN
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||||
F 0 "R2" H 10620 4996 50 0000 L CNN
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||||
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||||
F 2 "Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical" V 10480 4950 50 0001 C CNN
|
||||
F 3 "~" H 10550 4950 50 0001 C CNN
|
||||
1 10550 4950
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||||
1 0 0 -1
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||||
$EndComp
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||||
$Comp
|
||||
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||||
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||||
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||||
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||||
F 2 "" V 10730 4950 50 0001 C CNN
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||||
F 0 "R3" H 10870 4996 50 0000 L CNN
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||||
F 1 "2K" H 10870 4905 50 0000 L CNN
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||||
F 2 "Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical" V 10730 4950 50 0001 C CNN
|
||||
F 3 "~" H 10800 4950 50 0001 C CNN
|
||||
1 10800 4950
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||||
1 0 0 -1
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||||
$EndComp
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||||
$Comp
|
||||
L Device:R R?
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L Device:R R4
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||||
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||||
F 2 "" V 10980 4950 50 0001 C CNN
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||||
F 0 "R4" H 11120 4996 50 0000 L CNN
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||||
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||||
F 2 "Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical" V 10980 4950 50 0001 C CNN
|
||||
F 3 "~" H 11050 4950 50 0001 C CNN
|
||||
1 11050 4950
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||||
1 0 0 -1
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||||
$EndComp
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||||
$Comp
|
||||
L Device:R R?
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L Device:R R5
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||||
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F 0 "R?" H 11370 4996 50 0000 L CNN
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||||
F 1 "R" H 11370 4905 50 0000 L CNN
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||||
F 2 "" V 11230 4950 50 0001 C CNN
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||||
F 0 "R5" H 11370 4996 50 0000 L CNN
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||||
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||||
F 2 "Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical" V 11230 4950 50 0001 C CNN
|
||||
F 3 "~" H 11300 4950 50 0001 C CNN
|
||||
1 11300 4950
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||||
1 0 0 -1
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$EndComp
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||||
$Comp
|
||||
L Device:R R?
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||||
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||||
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F 0 "R?" H 11620 4996 50 0000 L CNN
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||||
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||||
F 2 "" V 11480 4950 50 0001 C CNN
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||||
F 0 "R6" H 11620 4996 50 0000 L CNN
|
||||
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||||
F 2 "Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical" V 11480 4950 50 0001 C CNN
|
||||
F 3 "~" H 11550 4950 50 0001 C CNN
|
||||
1 11550 4950
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||||
1 0 0 -1
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$EndComp
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||||
$Comp
|
||||
L Device:R R?
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||||
L Device:R R7
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||||
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||||
P 11800 4950
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F 0 "R?" H 11870 4996 50 0000 L CNN
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||||
F 1 "R" H 11870 4905 50 0000 L CNN
|
||||
F 2 "" V 11730 4950 50 0001 C CNN
|
||||
F 0 "R7" H 11870 4996 50 0000 L CNN
|
||||
F 1 "2K" H 11870 4905 50 0000 L CNN
|
||||
F 2 "Resistor_THT:R_Axial_DIN0204_L3.6mm_D1.6mm_P1.90mm_Vertical" V 11730 4950 50 0001 C CNN
|
||||
F 3 "~" H 11800 4950 50 0001 C CNN
|
||||
1 11800 4950
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||||
1 0 0 -1
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||||
$EndComp
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||||
Wire Wire Line
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||||
9100 3300 10600 3300
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9100 3300 9650 3300
|
||||
Wire Wire Line
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||||
10600 3300 10600 4800
|
||||
Wire Wire Line
|
||||
@ -890,12 +886,12 @@ Connection ~ 2650 4550
|
||||
Wire Wire Line
|
||||
2650 4550 2650 1600
|
||||
$Comp
|
||||
L 74xx:74LS32 U?
|
||||
L 74xx:74LS32 U3
|
||||
U 1 1 5FB50A31
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||||
P 7300 2700
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||||
F 0 "U?" H 7300 3025 50 0000 C CNN
|
||||
F 0 "U3" H 7300 3025 50 0000 C CNN
|
||||
F 1 "74LS32" H 7300 2934 50 0000 C CNN
|
||||
F 2 "" H 7300 2700 50 0001 C CNN
|
||||
F 2 "Package_DIP:DIP-14_W7.62mm" H 7300 2700 50 0001 C CNN
|
||||
F 3 "http://www.ti.com/lit/gpn/sn74LS32" H 7300 2700 50 0001 C CNN
|
||||
1 7300 2700
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||||
1 0 0 -1
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||||
@ -911,12 +907,12 @@ Wire Wire Line
|
||||
Wire Wire Line
|
||||
8600 2700 8600 2600
|
||||
$Comp
|
||||
L 74xx:74LS32 U?
|
||||
L 74xx:74LS32 U3
|
||||
U 2 1 5FB9C73F
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||||
P 4800 4450
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||||
F 0 "U?" H 4800 4775 50 0000 C CNN
|
||||
F 0 "U3" H 4800 4775 50 0000 C CNN
|
||||
F 1 "74LS32" H 4800 4684 50 0000 C CNN
|
||||
F 2 "" H 4800 4450 50 0001 C CNN
|
||||
F 2 "Package_DIP:DIP-14_W7.62mm" H 4800 4450 50 0001 C CNN
|
||||
F 3 "http://www.ti.com/lit/gpn/sn74LS32" H 4800 4450 50 0001 C CNN
|
||||
2 4800 4450
|
||||
1 0 0 -1
|
||||
@ -931,12 +927,12 @@ Wire Wire Line
|
||||
Wire Wire Line
|
||||
5900 4450 5900 2600
|
||||
$Comp
|
||||
L 74xx:74LS32 U?
|
||||
L 74xx:74LS32 U3
|
||||
U 3 1 5FBF09C5
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||||
P 7400 4500
|
||||
F 0 "U?" H 7400 4825 50 0000 C CNN
|
||||
F 0 "U3" H 7400 4825 50 0000 C CNN
|
||||
F 1 "74LS32" H 7400 4734 50 0000 C CNN
|
||||
F 2 "" H 7400 4500 50 0001 C CNN
|
||||
F 2 "Package_DIP:DIP-14_W7.62mm" H 7400 4500 50 0001 C CNN
|
||||
F 3 "http://www.ti.com/lit/gpn/sn74LS32" H 7400 4500 50 0001 C CNN
|
||||
3 7400 4500
|
||||
1 0 0 -1
|
||||
@ -949,12 +945,12 @@ Wire Wire Line
|
||||
7000 3100 7000 4400
|
||||
Connection ~ 7000 3100
|
||||
$Comp
|
||||
L 74xx:74LS32 U?
|
||||
L 74xx:74LS32 U3
|
||||
U 4 1 5FC54438
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||||
P 4800 4950
|
||||
F 0 "U?" H 4800 5275 50 0000 C CNN
|
||||
F 0 "U3" H 4800 5275 50 0000 C CNN
|
||||
F 1 "74LS32" H 4800 5184 50 0000 C CNN
|
||||
F 2 "" H 4800 4950 50 0001 C CNN
|
||||
F 2 "Package_DIP:DIP-14_W7.62mm" H 4800 4950 50 0001 C CNN
|
||||
F 3 "http://www.ti.com/lit/gpn/sn74LS32" H 4800 4950 50 0001 C CNN
|
||||
4 4800 4950
|
||||
1 0 0 -1
|
||||
@ -1005,12 +1001,12 @@ Connection ~ 8400 2700
|
||||
Wire Wire Line
|
||||
8400 2700 8600 2700
|
||||
$Comp
|
||||
L 74xx:74LS00 U?
|
||||
L 74xx:74LS00 U2
|
||||
U 1 1 5FD4E618
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||||
P 3850 3500
|
||||
F 0 "U?" H 3850 3825 50 0000 C CNN
|
||||
F 0 "U2" H 3850 3825 50 0000 C CNN
|
||||
F 1 "74LS00" H 3850 3734 50 0000 C CNN
|
||||
F 2 "" H 3850 3500 50 0001 C CNN
|
||||
F 2 "Package_DIP:DIP-14_W7.62mm" H 3850 3500 50 0001 C CNN
|
||||
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||||
1 3850 3500
|
||||
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||||
@ -1021,12 +1017,12 @@ Wire Wire Line
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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|
||||
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|
||||
@ -1058,12 +1054,12 @@ Connection ~ 2700 4100
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
3 4100 4850
|
||||
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|
||||
@ -1072,12 +1068,12 @@ Connection ~ 3800 4750
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
8000 6350 7700 6350
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||||
Connection ~ 8000 6350
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||||
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|
||||
8000 5350 7700 5350
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||||
Wire Wire Line
|
||||
7250 5350 6900 5350
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||||
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|
||||
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||||
Connection ~ 7250 5350
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||||
Connection ~ 5950 5400
|
||||
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||||
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||||
Wire Wire Line
|
||||
2750 3800 2750 4000
|
||||
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|
||||
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||||
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|
||||
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||||
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||||
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||||
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||||
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||||
Wire Wire Line
|
||||
3450 3700 3450 4050
|
||||
Wire Wire Line
|
||||
3450 4050 2050 4050
|
||||
Wire Wire Line
|
||||
2050 4050 2050 3700
|
||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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||||
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||||
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|
||||
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|
||||
1 7700 6200
|
||||
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||||
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||||
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||||
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|
||||
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||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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||||
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||||
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|
||||
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|
||||
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||||
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||||
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||||
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||||
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|
||||
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||||
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||||
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||||
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|
||||
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|
||||
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||||
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||||
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|
||||
Wire Wire Line
|
||||
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|
||||
Wire Wire Line
|
||||
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||||
Wire Wire Line
|
||||
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||||
Wire Wire Line
|
||||
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|
||||
Connection ~ 9700 1250
|
||||
Wire Wire Line
|
||||
9700 1250 12850 1250
|
||||
Wire Wire Line
|
||||
9650 3300 9650 4400
|
||||
Wire Wire Line
|
||||
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|
||||
Wire Wire Line
|
||||
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|
||||
Connection ~ 9650 3300
|
||||
Wire Wire Line
|
||||
9650 3300 10600 3300
|
||||
Wire Wire Line
|
||||
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|
||||
Wire Wire Line
|
||||
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|
||||
Connection ~ 7700 6350
|
||||
Wire Wire Line
|
||||
7700 6350 7250 6350
|
||||
Wire Wire Line
|
||||
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|
||||
Connection ~ 7700 5350
|
||||
Wire Wire Line
|
||||
7700 5350 7250 5350
|
||||
Wire Wire Line
|
||||
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||||
Connection ~ 7250 6350
|
||||
Wire Wire Line
|
||||
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|
||||
Connection ~ 6900 5350
|
||||
Wire Wire Line
|
||||
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|
||||
Wire Wire Line
|
||||
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||||
Connection ~ 6450 7500
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Wire Wire Line
|
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||||
Wire Wire Line
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||||
Wire Wire Line
|
||||
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||||
Wire Wire Line
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||||
Connection ~ 6750 5350
|
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Wire Wire Line
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||||
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||||
Wire Wire Line
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||||
Wire Wire Line
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||||
Connection ~ 5150 2900
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Wire Wire Line
|
||||
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||||
Connection ~ 5400 2450
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Wire Wire Line
|
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$EndSCHEMATC
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||||
|
||||
214
Hardware/Hardware.pretty/Apple II Expansion Edge Connector.kicad_mod
Executable file
214
Hardware/Hardware.pretty/Apple II Expansion Edge Connector.kicad_mod
Executable file
@ -0,0 +1,214 @@
|
||||
(module "Connector:Apple II Expansion Edge Connector" (layer F.Cu) (tedit 5CA41682)
|
||||
(fp_text reference REF** (at 0 0.5) (layer F.SilkS)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_text value "Apple II Expansion Edge Connector" (at 9.652 -5.08) (layer F.Fab)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_text user "26 GND" (at 45.974 10.922 45) (layer F.Fab)
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(effects (font (size 0.762 0.762) (thickness 0.127)))
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)
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(fp_text user "27 DMA IN" (at 42.799 11.43 45) (layer F.Fab)
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(effects (font (size 0.762 0.762) (thickness 0.127)))
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(fp_text user "28 INT IN" (at 40.386 11.303 45) (layer F.Fab)
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|
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|
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||||
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|
||||
(fp_text user "14 A12" (at 20.193 -0.508 45) (layer F.Fab)
|
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(fp_text user "15 A13" (at 22.733 -0.508 45) (layer F.Fab)
|
||||
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|
||||
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)
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|
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||||
)
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(fp_text user "11 A9" (at 12.319 -0.254 45) (layer F.Fab)
|
||||
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|
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|
||||
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|
||||
)
|
||||
(fp_poly (pts (xy 48.895 8.89) (xy 48.895 1.27) (xy -15.875 1.27) (xy -15.875 8.89)) (layer B.Mask) (width 0.15))
|
||||
(fp_poly (pts (xy 48.895 8.89) (xy 48.895 1.27) (xy -15.875 1.27) (xy -15.875 8.89)) (layer F.Mask) (width 0.15))
|
||||
(fp_text user "50 +12V" (at -15.494 11.43 45) (layer F.Fab)
|
||||
(effects (font (size 0.762 0.762) (thickness 0.127)))
|
||||
)
|
||||
(fp_text user "1 _I/O SELECT" (at -11.303 -2.032 45) (layer F.Fab)
|
||||
(effects (font (size 0.762 0.762) (thickness 0.127)))
|
||||
)
|
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(fp_text user "3 A1" (at -8.128 -0.127 45) (layer F.Fab)
|
||||
(effects (font (size 0.762 0.762) (thickness 0.127)))
|
||||
)
|
||||
(fp_text user "5 A3" (at -3.048 0 45) (layer F.Fab)
|
||||
(effects (font (size 0.762 0.762) (thickness 0.127)))
|
||||
)
|
||||
(fp_text user "4 A2" (at -5.588 0.127 45) (layer F.Fab)
|
||||
(effects (font (size 0.762 0.762) (thickness 0.127)))
|
||||
)
|
||||
(fp_text user "49 D0" (at -12.446 10.668 45) (layer F.Fab)
|
||||
(effects (font (size 0.762 0.762) (thickness 0.127)))
|
||||
)
|
||||
(fp_text user "2 A0" (at -10.668 -0.127 45) (layer F.Fab)
|
||||
(effects (font (size 0.762 0.762) (thickness 0.127)))
|
||||
)
|
||||
(fp_text user "8 A6" (at 4.445 0 45) (layer F.Fab)
|
||||
(effects (font (size 0.762 0.762) (thickness 0.127)))
|
||||
)
|
||||
(fp_text user "6 A4" (at -0.635 0 45) (layer F.Fab)
|
||||
(effects (font (size 0.762 0.762) (thickness 0.127)))
|
||||
)
|
||||
(fp_text user "9 A7" (at 6.985 0 45) (layer F.Fab)
|
||||
(effects (font (size 0.762 0.762) (thickness 0.127)))
|
||||
)
|
||||
(fp_text user "7 A5" (at 1.905 0 45) (layer F.Fab)
|
||||
(effects (font (size 0.762 0.762) (thickness 0.127)))
|
||||
)
|
||||
(fp_line (start -15.875 1.27) (end -16.51 1.27) (layer F.SilkS) (width 0.15))
|
||||
(fp_line (start -15.875 7.62) (end -15.875 1.27) (layer F.SilkS) (width 0.15))
|
||||
(fp_line (start 48.895 1.27) (end 49.53 1.27) (layer F.SilkS) (width 0.15))
|
||||
(fp_line (start 48.895 7.62) (end 48.895 1.27) (layer F.SilkS) (width 0.15))
|
||||
(pad 50 connect roundrect (at -13.97 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25))
|
||||
(pad 49 connect roundrect (at -11.43 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25))
|
||||
(pad 48 connect roundrect (at -8.89 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25))
|
||||
(pad 47 connect roundrect (at -6.35 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25))
|
||||
(pad 46 connect roundrect (at -3.81 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25))
|
||||
(pad 45 connect roundrect (at -1.27 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25))
|
||||
(pad 44 connect roundrect (at 1.27 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25))
|
||||
(pad 43 connect roundrect (at 3.81 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25))
|
||||
(pad 42 connect roundrect (at 6.35 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25))
|
||||
(pad 41 connect roundrect (at 8.89 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25))
|
||||
(pad 40 connect roundrect (at 11.43 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25))
|
||||
(pad 39 connect roundrect (at 13.97 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25))
|
||||
(pad 37 connect roundrect (at 19.05 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25))
|
||||
(pad 38 connect roundrect (at 16.51 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25))
|
||||
(pad 36 connect roundrect (at 21.59 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25))
|
||||
(pad 35 connect roundrect (at 24.13 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25))
|
||||
(pad 34 connect roundrect (at 26.67 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25))
|
||||
(pad 33 connect roundrect (at 29.21 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25))
|
||||
(pad 32 connect roundrect (at 31.75 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25))
|
||||
(pad 31 connect roundrect (at 34.29 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25))
|
||||
(pad 30 connect roundrect (at 36.83 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25))
|
||||
(pad 29 connect roundrect (at 39.37 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25))
|
||||
(pad 28 connect roundrect (at 41.91 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25))
|
||||
(pad 27 connect roundrect (at 44.45 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25))
|
||||
(pad 26 connect roundrect (at 46.99 5.08) (size 1.27 7.62) (layers B.Cu B.Mask) (roundrect_rratio 0.25))
|
||||
(pad 25 connect roundrect (at 46.99 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25))
|
||||
(pad 24 connect roundrect (at 44.45 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25))
|
||||
(pad 23 connect roundrect (at 41.91 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25))
|
||||
(pad 22 connect roundrect (at 39.37 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25))
|
||||
(pad 21 connect roundrect (at 36.83 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25))
|
||||
(pad 20 connect roundrect (at 34.29 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25))
|
||||
(pad 19 connect roundrect (at 31.75 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25))
|
||||
(pad 18 connect roundrect (at 29.21 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25))
|
||||
(pad 17 connect roundrect (at 26.67 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25))
|
||||
(pad 16 connect roundrect (at 24.13 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25))
|
||||
(pad 15 connect roundrect (at 21.59 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25))
|
||||
(pad 14 connect roundrect (at 19.05 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25))
|
||||
(pad 13 connect roundrect (at 16.51 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25))
|
||||
(pad 12 connect roundrect (at 13.97 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25))
|
||||
(pad 11 connect roundrect (at 11.43 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25))
|
||||
(pad 10 connect roundrect (at 8.89 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25))
|
||||
(pad 9 connect roundrect (at 6.35 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25))
|
||||
(pad 8 connect roundrect (at 3.81 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25))
|
||||
(pad 7 connect roundrect (at 1.27 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25))
|
||||
(pad 6 connect roundrect (at -1.27 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25))
|
||||
(pad 5 connect roundrect (at -3.81 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25))
|
||||
(pad 4 connect roundrect (at -6.35 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25))
|
||||
(pad 3 connect roundrect (at -8.89 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25))
|
||||
(pad 2 connect roundrect (at -11.43 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25))
|
||||
(pad 1 connect roundrect (at -13.97 5.08) (size 1.27 7.62) (layers F.Cu F.Mask) (roundrect_rratio 0.25))
|
||||
)
|
||||
3
Hardware/fp-lib-table
Normal file
3
Hardware/fp-lib-table
Normal file
@ -0,0 +1,3 @@
|
||||
(fp_lib_table
|
||||
(lib (name Hardware)(type KiCad)(uri /home/terence/source/Apple2-IO-RPi/Hardware/Hardware.pretty)(options "")(descr ""))
|
||||
)
|
||||
Loading…
Reference in New Issue
Block a user