forked from Apple-2-HW/AppleIISd
Schematic PDF updated
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Stückliste exportiert aus C:/Projekte/AppleIISd/trunk/Hardware/SD_A2.sch am 24.08.2017 17:37
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Qty Value Device Package Parts Description
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1 A2-50PINSLOT1-3 A2-50PIN-SL1-3 ST1 Apple ][ Peripheral Card Connector
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1 LEDSQR2X5 LED2X5 LED1 LED
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1 MA03-1 MA03-1 SV1 PIN HEADER
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1 MA06-1 MA06-1 SV2 PIN HEADER
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6 100k R-EU_R0603 R0603 R3, R5, R6, R7, R9, R11 RESISTOR, European symbol
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6 100n C-EUC0603K C0603K C1, C3, C4, C5, C6, C7 CAPACITOR, European symbol
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1 104H-TDA0-R 104H-TDA0-R 104H-TDA0-R U$2
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1 10k R-EU_R0603 R0603 R10 RESISTOR, European symbol
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3 10n C-EUC0603K C0603K C8, C9, C10 CAPACITOR, European symbol
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1 1u CPOL-EU153CLV-0405 153CLV-0405 C2 POLARIZED CAPACITOR, European symbol
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1 200 R-EU_R0603 R0603 R1 RESISTOR, European symbol
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1 2716 / 2732 2716 DIL24 IC3 MEMORY
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1 330 R-EU_R0603 R0603 R2 RESISTOR, European symbol
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1 470 R-EU_R0603 R0603 R4 RESISTOR, European symbol
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1 68k R-EU_R0603 R0603 R8 RESISTOR, European symbol
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1 74HCT245N 74HCT245N DIL20 IC1 Octal BUS TRANSCEIVER, 3-state
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1 LM317 LM317TL 317TL IC2 VOLTAGE REGULATOR
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1 XC9572XL XC9572_S44 S44 IC4
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Stückliste exportiert aus /Volumes/Data/Users/bluemeanie/Documents/Git/AppleIISd/Hardware/SD_A2.sch am 01.12.17 16:16
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Qty Value Device Package Parts Description MF MPN OC_FARNELL OC_NEWARK
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1 A2-50PINSLOT1-3 A2-50PIN-SL1-3 ST1 Apple ][ Peripheral Card Connector
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1 LEDSQR2X5 LED2X5 LED1 LED
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1 MA03-1 MA03-1 SV1 PIN HEADER unknown unknown
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1 MA06-1 MA06-1 SV2 PIN HEADER unknown unknown
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6 100k R-EU_R0603 R0603 R3, R5, R6, R7, R9, R11 RESISTOR, European symbol
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9 100n C-EUC0603K C0603K C1, C3, C4, C5, C6, C7, C11, C12, C13 CAPACITOR, European symbol
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1 104H-TDA0-R 104H-TDA0-R 104H-TDA0-R U$2
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3 10n C-EUC0603K C0603K C8, C9, C10 CAPACITOR, European symbol
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1 1u CPOL-EU153CLV-0405 153CLV-0405 C2 POLARIZED CAPACITOR, European symbol
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1 200 R-EU_R0603 R0603 R1 RESISTOR, European symbol
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1 2716 / 2732 2716 DIL24 IC3 MEMORY
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1 330 R-EU_R0603 R0603 R2 RESISTOR, European symbol
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1 470 R-EU_R0603 R0603 R4 RESISTOR, European symbol
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1 68k R-EU_R0603 R0603 R8 RESISTOR, European symbol
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1 74LS245N 74LS245N DIL20 IC1 Octal BUS TRANSCEIVER, 3-state
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1 LM317 LM317TL 317TL IC2 VOLTAGE REGULATOR
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1 XC9572XL XC9572_S44 S44 IC4
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BIN
AppleIISd.pdf
BIN
AppleIISd.pdf
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25
Hardware/SD_A2.brd
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Hardware/SD_A2.brd
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@ -8,7 +8,7 @@
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</settings>
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<grid distance="0.1" unitdist="mm" unit="mm" style="dots" multiple="1" display="yes" altdistance="0.1" altunitdist="mil" altunit="mil"/>
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<layers>
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<layer number="1" name="Top" color="4" fill="1" visible="yes" active="yes"/>
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<layer number="1" name="Top" color="4" fill="1" visible="no" active="yes"/>
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<layer number="16" name="Bottom" color="1" fill="1" visible="yes" active="yes"/>
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<layer number="17" name="Pads" color="2" fill="1" visible="yes" active="yes"/>
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<layer number="18" name="Vias" color="2" fill="1" visible="yes" active="yes"/>
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@ -65,7 +65,7 @@
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</layers>
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<board>
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<plain>
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<text x="2.25" y="11.25" size="1.27" layer="25" font="vector" ratio="7">Apple ][ SD V1.1
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<text x="2.25" y="11.25" size="1.27" layer="25" font="vector" ratio="7">Apple II SD V1.1
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(C) Florian Reitz 2017</text>
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<wire x1="0" y1="7.8" x2="24.9" y2="7.8" width="0.254" layer="20"/>
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<wire x1="24.9" y1="7.8" x2="24.9" y2="0.5" width="0.254" layer="20"/>
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@ -3361,13 +3361,13 @@ Covered vias can be set in Masks (Limit).
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<attribute name="NAME" x="24.05" y="12.9" size="1.016" layer="26" rot="MR90"/>
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<attribute name="VALUE" x="24.35" y="12.9" size="1.016" layer="28" rot="MR90"/>
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</element>
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<element name="C12" library="rcl" package="C0603K" value="100n" x="62.6" y="14.9" smashed="yes" rot="MR0">
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<attribute name="NAME" x="60.9" y="14.45" size="1.016" layer="26" rot="MR0"/>
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<attribute name="VALUE" x="63.4" y="13.25" size="1.016" layer="28" rot="MR0"/>
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<element name="C12" library="rcl" package="C0603K" value="100n" x="64.8" y="14.5" smashed="yes" rot="MR90">
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<attribute name="NAME" x="64.35" y="16.2" size="1.016" layer="26" rot="MR90"/>
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<attribute name="VALUE" x="63.15" y="13.7" size="1.016" layer="28" rot="MR90"/>
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</element>
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<element name="C13" library="rcl" package="C0603K" value="100n" x="62.6" y="13.6" smashed="yes" rot="MR0">
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<attribute name="NAME" x="60.9" y="13.15" size="1.016" layer="26" rot="MR0"/>
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<attribute name="VALUE" x="63.4" y="11.95" size="1.016" layer="28" rot="MR0"/>
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<element name="C13" library="rcl" package="C0603K" value="100n" x="63.5" y="14.5" smashed="yes" rot="MR90">
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<attribute name="NAME" x="63.05" y="16.2" size="1.016" layer="26" rot="MR90"/>
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<attribute name="VALUE" x="61.85" y="13.7" size="1.016" layer="28" rot="MR90"/>
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</element>
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</elements>
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<signals>
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@ -4268,9 +4268,8 @@ Covered vias can be set in Masks (Limit).
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<wire x1="70.485" y1="8.815" x2="69.3" y2="10" width="0.4" layer="16"/>
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<wire x1="65.3" y1="10" x2="64.5" y2="10.8" width="0.4" layer="16"/>
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<wire x1="69.3" y1="10" x2="65.3" y2="10" width="0.4" layer="16"/>
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<wire x1="64.5" y1="10.8" x2="64.5" y2="14.5" width="0.4" layer="16"/>
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<wire x1="64.5" y1="14.5" x2="64.1" y2="14.9" width="0.4" layer="16"/>
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<wire x1="64.1" y1="14.9" x2="63.475" y2="14.9" width="0.4" layer="16"/>
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<wire x1="64.5" y1="10.8" x2="64.5" y2="13.325" width="0.4" layer="16"/>
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<wire x1="64.5" y1="13.325" x2="64.8" y2="13.625" width="0.4" layer="16"/>
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</signal>
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<signal name="-5V">
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<contactref element="ST1" pad="34"/>
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@ -4279,8 +4278,8 @@ Covered vias can be set in Masks (Limit).
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<wire x1="67.945" y1="8.455" x2="67.2" y2="9.2" width="0.4" layer="16"/>
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<wire x1="67.2" y1="9.2" x2="65.2" y2="9.2" width="0.4" layer="16"/>
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<wire x1="65.2" y1="9.2" x2="63.8" y2="10.6" width="0.4" layer="16"/>
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<wire x1="63.8" y1="10.6" x2="63.8" y2="13.275" width="0.4" layer="16"/>
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<wire x1="63.8" y1="13.275" x2="63.475" y2="13.6" width="0.4" layer="16"/>
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<wire x1="63.8" y1="10.6" x2="63.8" y2="13.325" width="0.4" layer="16"/>
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<wire x1="63.8" y1="13.325" x2="63.5" y2="13.625" width="0.4" layer="16"/>
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</signal>
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</signals>
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</board>
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Hardware/SD_A2.sch
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@ -16907,7 +16907,9 @@ Program CPLD</text>
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<instance part="GND9" gate="1" x="325.12" y="162.56" rot="R180"/>
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<instance part="R11" gate="G$1" x="281.94" y="154.94"/>
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<instance part="C1" gate="G$1" x="96.52" y="20.32"/>
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<instance part="P+6" gate="1" x="81.28" y="40.64"/>
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<instance part="P+6" gate="1" x="81.28" y="40.64" smashed="yes">
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<attribute name="VALUE" x="78.74" y="35.56" size="1.778" layer="96" rot="R90"/>
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</instance>
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<instance part="P-1" gate="1" x="81.28" y="25.4" smashed="yes" rot="R180">
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<attribute name="VALUE" x="78.74" y="20.32" size="1.778" layer="96" rot="R90"/>
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</instance>
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