|GR8RAM
C7M => always3.IN0
C7M => CASr.CLK
C7M => CASel.CLK
C7M => RASr.CLK
C7M => IOROMEN.CLK
C7M => REGEN.CLK
C7M => CSEN.CLK
C7M => DBEN.CLK
C7M => Ref[0].CLK
C7M => Ref[1].CLK
C7M => Ref[2].CLK
C7M => Ref[3].CLK
C7M => S[0].CLK
C7M => S[1].CLK
C7M => S[2].CLK
C7M => PHI0seen.CLK
C7M => PHI1reg.CLK
C7M_2 => ~NO_FANOUT~
Q3 => ~NO_FANOUT~
PHI0in => ~NO_FANOUT~
PHI1in => comb.IN0
PHI1in => PHI1b0_MC.DATAIN
nRES => always1.IN0
nMode => ~NO_FANOUT~
A[0] => Equal0.IN7
A[0] => Equal1.IN7
A[0] => Equal2.IN7
A[0] => Equal3.IN7
A[0] => Equal4.IN7
A[0] => Equal5.IN7
A[0] => Equal13.IN21
A[1] => Equal0.IN6
A[1] => Equal1.IN6
A[1] => Equal2.IN6
A[1] => Equal3.IN6
A[1] => Equal4.IN6
A[1] => Equal5.IN6
A[1] => Equal13.IN20
A[2] => Equal0.IN5
A[2] => Equal1.IN5
A[2] => Equal2.IN5
A[2] => Equal3.IN5
A[2] => Equal4.IN5
A[2] => Equal5.IN5
A[2] => Equal13.IN19
A[3] => Equal0.IN4
A[3] => Equal1.IN4
A[3] => Equal2.IN4
A[3] => Equal3.IN4
A[3] => Equal4.IN4
A[3] => Equal5.IN4
A[3] => Equal13.IN18
A[4] => Equal13.IN17
A[5] => Equal13.IN16
A[6] => Equal13.IN15
A[7] => Equal13.IN14
A[8] => Equal13.IN13
A[9] => Equal13.IN12
A[10] => Equal13.IN11
A[11] => ~NO_FANOUT~
A[12] => ~NO_FANOUT~
A[13] => ~NO_FANOUT~
A[14] => ~NO_FANOUT~
A[15] => ~NO_FANOUT~
RA[0] <= RA.DB_MAX_OUTPUT_PORT_TYPE
RA[1] <= RA.DB_MAX_OUTPUT_PORT_TYPE
RA[2] <= RA.DB_MAX_OUTPUT_PORT_TYPE
RA[3] <= RA.DB_MAX_OUTPUT_PORT_TYPE
RA[4] <= RA.DB_MAX_OUTPUT_PORT_TYPE
RA[5] <= RA.DB_MAX_OUTPUT_PORT_TYPE
RA[6] <= RA.DB_MAX_OUTPUT_PORT_TYPE
RA[7] <= RA.DB_MAX_OUTPUT_PORT_TYPE
RA[8] <= RA.DB_MAX_OUTPUT_PORT_TYPE
RA[9] <= RA.DB_MAX_OUTPUT_PORT_TYPE
RA[10] <= RA.DB_MAX_OUTPUT_PORT_TYPE
nWE => comb.IN0
nWE => comb.IN0
nWE => comb.IN0
nWE => comb.IN0
nWE => comb.IN0
nWE => comb.IN0
nWE => comb.IN0
nWE => comb.DATAB
nWE => CSEN.IN1
nWE => RASr.IN1
nWE => CASel.IN0
nWE => CASr.IN1
nWE => CAS0f.IN1
nWE => CAS1f.IN1
D[0] <> D[0]
D[1] <> D[1]
D[2] <> D[2]
D[3] <> D[3]
D[4] <> D[4]
D[5] <> D[5]
D[6] <> D[6]
D[7] <> D[7]
RD[0] <> RD[0]
RD[1] <> RD[1]
RD[2] <> RD[2]
RD[3] <> RD[3]
RD[4] <> RD[4]
RD[5] <> RD[5]
RD[6] <> RD[6]
RD[7] <> RD[7]
nDEVSEL => comb.IN0
nDEVSEL => comb.IN0
nDEVSEL => comb.IN0
nDEVSEL => comb.IN0
nDEVSEL => comb.IN0
nDEVSEL => comb.IN0
nDEVSEL => comb.IN0
nDEVSEL => comb.IN0
nIOSEL => RA.IN1
nIOSEL => RA.IN0
nIOSEL => comb.IN0
nIOSTRB => RA.IN0
nIOSTRB => RA.IN1
nIOSTRB => RA.IN1
nINH <= nINH.DB_MAX_OUTPUT_PORT_TYPE
nRAS <= comb.DB_MAX_OUTPUT_PORT_TYPE
nCAS0 <= comb.DB_MAX_OUTPUT_PORT_TYPE
nCAS1 <= comb.DB_MAX_OUTPUT_PORT_TYPE
nRCS <= comb.DB_MAX_OUTPUT_PORT_TYPE
nROE <= comb.DB_MAX_OUTPUT_PORT_TYPE
nRWE <= comb.DB_MAX_OUTPUT_PORT_TYPE


