UFM Load

LState	ARCLK	ARShft	DRCLK	DRShft		UFM
--------------------------------------------------------------------------------
$0000	0		1		0		0
$0FBF	0		1		0		0
...
$0FC0	1		1		0		0
$0FC1	1		1		0		0
$0FC2	0		1		0		0
$0FC3	0		1		0		0
$0FC4	1		1		0		0
$0FC5	1		1		0		0
$0FC6	0		1		0		0
$0FC7	0		1		0		0
$0FC8	1		1		0		0
$0FC9	1		1		0		0
$0FCA	0		1		0		0
$0FCB	0		1		0		0
$0FCC	1		1		0		0
$0FCD	1		1		0		0
$0FCE	0		1		0		0
$0FCF	0		1		0		0
$0FD0	1		1		0		0
$0FD1	1		1		0		0
$0FD2	0		1		0		0
$0FD3	0		1		0		0
$0FD4	1		1		0		0
$0FD5	1		1		0		0
$0FD6	0		1		0		0
$0FD7	0		1		0		0
$0FD8	1		1		0		0
$0FD9	1		1		0		0
$0FDA	0		1		0		0
$0FDB	0		1		0		0
$0FDC	1		1		0		0
$0FDD	1		1		0		0
$0FDE	0		1		0		0
$0FDF	0		1		0		0
$0FE0	1		1		0		0
$0FE1	1		1		0		0
$0FE2	0		1		0		0
$0FE3	0		1		0		0
$0FE4	1		1		0		0
$0FE5	1		1		0		0
$0FE6	0		1		0		0
$0FE7	0		1		0		0
$0FE8	1		1		0		0
$0FE9	1		1		0		0
$0FEA	0		1		0		0
$0FEB	0		1		0		0
$0FEC	1		1		0		0
$0FED	1		1		0		0
$0FEE	0		1		0		0
$0FEF	0		1		0		0
$0FF0	1		1		0		0
$0FF1	1		1		0		0
$0FF2	0		1		0		0
$0FF3	0		1		0		0
$0FF4	1		1		0		0
$0FF5	1		1		0		0
$0FF6	0		1		0		0
$0FF7	0		1		0		0
$0FF8	1		1		0		0
$0FF9	1		1		0		0
$0FFA	0		1		0		0
$0FFB	0		1		0		0
$0FFC	1		1		0		0
$0FFD	1		1		0		0
$0FFE	0		1		0		0
$0FFF	0		1		0		0

$1000	0		0		1		0			parallel load into DR
$1001	0		0		1		0			
$1002	0		0		0		1			
$1003	0		0		0		1			
$1004	0		0		1		1			SetLoaded <= Dout
$1005	0		0		1		1			
$1006	0		0		0		1			
$1007	0		0		0		1			
$1008	0		0		1		1			latch DR[14] (nSetFW[1])
$1009	0		0		1		1			
$100A	0		0		0		1			
$100B	0		0		0		1			
$100C	0		0		1		1			latch DR[13] (nSetFW[0])
$100D	0		0		1		1			
$100E	0		0		0		1			
$100F	0		0		0		1			
$1010	0		0		0		1			latch DR[12] (nSetLim8M)
$1011	0		0		0		1			
$1012	0		0		0		1			
$1013	0		0		0		1			
$1014	0		0		0		1			
$1015	0		0		0		1			
$1016	0		0		0		1			
$1017	0		0		0		1			
$1018	0		0		0		1			
$1019	0		0		0		1			
$101A	0		0		0		1			
$101B	0		0		0		1			
$101C	1		0		0		1			Increment address
$101D	1		0		0		1			
$101E	0		0		0		1			
$101F	0		0		0		1			
...
$2FE0	0		0		1		0			parallel load into DR
$2FE1	0		0		1		0			
$2FE2	0		0		0		1			
$2FE3	0		0		0		1			
$2FE4	0		0		1		1			SetLoaded <= Dout
$2FE5	0		0		1		1			
$2FE6	0		0		0		1			
$2FE7	0		0		0		1			
$2FE8	0		0		1		1			latch DR[14] (nSetFW[1])
$2FE9	0		0		1		1			
$2FEA	0		0		0		1			
$2FEB	0		0		0		1			
$2FEC	0		0		1		1			latch DR[13] (nSetFW[0])
$2FED	0		0		1		1			
$2FEE	0		0		0		1			
$2FEF	0		0		0		1			
$2FF0	0		0		0		1			latch DR[12] (nSetLim8M)
$2FF1	0		0		0		1			
$2FF2	0		0		0		1			
$2FF3	0		0		0		1			
$2FF4	0		0		0		1			
$2FF5	0		0		0		1			
$2FF6	0		0		0		1			
$2FF7	0		0		0		1			
$2FF8	0		0		0		1			
$2FF9	0		0		0		1			
$2FFA	0		0		0		1			
$2FFB	0		0		0		1			
$2FFC	1		0		0		1			Increment address
$2FFD	1		0		0		1			
$2FFE	0		0		0		1			
$2FFF	0		0		0		1			

$3000	0		0		0		0			Everything 0, set SetLoaded