forked from Apple-2-HW/arduino-appleii
503 lines
11 KiB
C
503 lines
11 KiB
C
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int testAdcImmediate() {
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//no carry
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A = 0x00;
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SR&=(~SR_CARRY);
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ram[0] = 0x69;
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ram[1] = 0x01;
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instructions = 1; run();
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if(!(A == 0x01 && !SR&SR_NEG && !SR&SR_ZERO && !SR&SR_CARRY && !SR&SR_OVER)) return -1;
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//with carry
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A = 0x00;
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SR|=SR_CARRY;
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ram[0] = 0x69;
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ram[1] = 0x01;
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instructions = 1; run();
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if(!(A == 0x02 && !(SR&SR_NEG) && !(SR&SR_ZERO) && !(SR&SR_CARRY) && !(SR&SR_OVER))) return -2;
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//negative result
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A = 0xFE;
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SR&=(~SR_CARRY);
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ram[0] = 0x69;
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ram[1] = 0xFE;
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instructions = 1; run();
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if(!(A == 0xFC && SR&SR_NEG && !(SR&SR_ZERO) && SR&SR_CARRY && !(SR&SR_OVER))) return -3;
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//overflow result
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A = 0x80;
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SR&=(~SR_CARRY);
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ram[0] = 0x69;
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ram[1] = 0xFF;
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instructions = 1; run();
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if(!(A == 0x7F && !(SR&SR_NEG) && !(SR&SR_ZERO) && SR&SR_CARRY && SR&SR_OVER)) return -4;
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//zero result
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A = 0xFF; //-1
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SR&=(~SR_CARRY);
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ram[0] = 0x69;
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ram[1] = 0x01; //+1
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instructions = 1; run();
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if(!(A == 0x00 && !(SR&SR_NEG) && SR&SR_ZERO && SR&SR_CARRY && !(SR&SR_OVER))) return -5;
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//carry result
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A = 0xF0; //+70
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SR&=(~SR_CARRY);
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ram[0] = 0x69;
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ram[1] = 0xF0; //+70
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instructions = 1; run();
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if(!(A == 0xE0 && SR&SR_NEG && !(SR&SR_ZERO) && SR&SR_CARRY && !(SR&SR_OVER))) return -6;
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return 0;
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}
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int testAdcZeropage() {
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//no carry
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A = 0x00;
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SR &= (~SR_CARRY);
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ram[0] = 0x65;
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ram[1] = 0x02;
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ram[2] = 0x01;
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instructions = 1; run();
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if(!(A == 0x01 && !(SR&SR_NEG) && !(SR&SR_ZERO) && !(SR&SR_CARRY) && !(SR&SR_OVER))) return -1;
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//with carry
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A = 0x00;
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SR |= SR_CARRY;
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ram[0] = 0x65;
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ram[1] = 0x02;
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ram[2] = 0x01;
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instructions = 1; run();
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if(!(A == 0x02 && !(SR&SR_NEG) && !(SR&SR_ZERO) && !(SR&SR_CARRY) && !(SR&SR_OVER))) return -2;
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//negative result
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A = 0xFE;
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SR &= (~SR_CARRY);
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ram[0] = 0x65;
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ram[1] = 0x02;
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ram[2] = 0xFE;
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instructions = 1; run();
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if(!(A == 0xFC && SR&SR_NEG && !(SR&SR_ZERO) && SR&SR_CARRY && !(SR&SR_OVER))) return -3;
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//overflow result
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A = 0x80;
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SR &= (~SR_CARRY);
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ram[0] = 0x65;
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ram[1] = 0x02;
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ram[2] = 0xFF;
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instructions = 1; run();
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if(!(A == 0x7F && !(SR&SR_NEG) && !(SR&SR_ZERO) && SR&SR_CARRY && SR&SR_OVER)) return -4;
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//zero result
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A = 0xFF; //-1
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SR &= (~SR_CARRY);
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ram[0] = 0x65;
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ram[1] = 0x02;
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ram[2] = 0x01; //+1
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instructions = 1; run();
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if(!(A == 0x00 && !(SR&SR_NEG) && SR&SR_ZERO && SR&SR_CARRY && !(SR&SR_OVER))) return -5;
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//carry result
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A = 0xF0; //+70
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SR &= (~SR_CARRY);
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ram[0] = 0x65;
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ram[1] = 0x02;
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ram[2] = 0xF0; //+70
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instructions = 1; run();
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if(!(A == 0xE0 && SR&SR_NEG && !(SR&SR_ZERO) && SR&SR_CARRY && !(SR&SR_OVER))) return -6;
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return 0;
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}
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int testAdcZeropageX() {
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X = 0x01; Y=0x00;
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//no carry
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A = 0x00;
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SR &= (~SR_CARRY);
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ram[0] = 0x75;
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ram[1] = 0x02;
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ram[3] = 0x01;
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instructions = 1; run();
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if(!(A == 0x01 && !(SR&SR_NEG) && !(SR&SR_ZERO) && !(SR&SR_CARRY) && !(SR&SR_OVER))) return -1;
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//with carry
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A = 0x00;
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SR |= SR_CARRY;
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ram[0] = 0x75;
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ram[1] = 0x02;
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ram[3] = 0x01;
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instructions = 1; run();
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if(!(A == 0x02 && !(SR&SR_NEG) && !(SR&SR_ZERO) && !(SR&SR_CARRY) && !(SR&SR_OVER))) return -2;
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//negative result
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A = 0xFE;
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SR &= (~SR_CARRY);
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ram[0] = 0x75;
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ram[1] = 0x02;
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ram[3] = 0xFE;
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instructions = 1; run();
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if(!(A == 0xFC && SR&SR_NEG && !(SR&SR_ZERO) && SR&SR_CARRY && !(SR&SR_OVER))) return -3;
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//overflow result
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A = 0x80;
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SR &= (~SR_CARRY);
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ram[0] = 0x75;
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ram[1] = 0x02;
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ram[3] = 0xFF;
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instructions = 1; run();
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if(!(A == 0x7F && !(SR&SR_NEG) && !(SR&SR_ZERO) && SR&SR_CARRY && SR&SR_OVER)) return -4;
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//zero result
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A = 0xFF; //-1
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SR &= (~SR_CARRY);
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ram[0] = 0x75;
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ram[1] = 0x02;
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ram[3] = 0x01; //+1
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instructions = 1; run();
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if(!(A == 0x00 && !(SR&SR_NEG) && SR&SR_ZERO && SR&SR_CARRY && !(SR&SR_OVER))) return -5;
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//carry result
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A = 0xF0; //+70
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SR &= (~SR_CARRY);
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ram[0] = 0x75;
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ram[1] = 0x02;
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ram[3] = 0xF0; //+70
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instructions = 1; run();
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if(!(A == 0xE0 && SR&SR_NEG && !(SR&SR_ZERO) && SR&SR_CARRY && !(SR&SR_OVER))) return -6;
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return 0;
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}
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int testAdcAbsolute() {
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//no carry
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A = 0x00;
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SR &= (~SR_CARRY);
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ram[0] = 0x6D;
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ram[1] = 0x03;
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ram[2] = 0x00;
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ram[3] = 0x01;
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instructions = 1; run();
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if(!(A == 0x01 && !(SR&SR_NEG) && !(SR&SR_ZERO) && !(SR&SR_CARRY) && !(SR&SR_OVER))) return -1;
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//with carry
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A = 0x00;
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SR |= SR_CARRY;
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ram[0] = 0x6D;
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ram[1] = 0x03;
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ram[2] = 0x00;
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ram[3] = 0x01;
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instructions = 1; run();
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if(!(A == 0x02 && !(SR&SR_NEG) && !(SR&SR_ZERO) && !(SR&SR_CARRY) && !(SR&SR_OVER))) return -2;
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//negative result
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A = 0xFE;
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SR &= (~SR_CARRY);
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ram[0] = 0x6D;
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ram[1] = 0x03;
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ram[2] = 0x00;
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ram[3] = 0xFE;
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instructions = 1; run();
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if(!(A == 0xFC && SR&SR_NEG && !(SR&SR_ZERO) && SR&SR_CARRY && !(SR&SR_OVER))) return -3;
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//overflow result
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A = 0x80;
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SR &= (~SR_CARRY);
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ram[0] = 0x6D;
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ram[1] = 0x03;
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ram[2] = 0x00;
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ram[3] = 0xFF;
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instructions = 1; run();
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if(!(A == 0x7F && !(SR&SR_NEG) && !(SR&SR_ZERO) && SR&SR_CARRY && SR&SR_OVER)) return -4;
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//zero result
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A = 0xFF; //-1
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SR &= (~SR_CARRY);
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ram[0] = 0x6D;
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ram[1] = 0x03;
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ram[2] = 0x00;
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ram[3] = 0x01; //+1
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instructions = 1; run();
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if(!(A == 0x00 && !(SR&SR_NEG) && SR&SR_ZERO && SR&SR_CARRY && !(SR&SR_OVER))) return -5;
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//carry result
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A = 0xF0; //+70
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SR &= (~SR_CARRY);
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ram[0] = 0x6D;
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ram[1] = 0x03;
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ram[2] = 0x00;
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ram[3] = 0xF0; //+70
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instructions = 1; run();
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if(!(A == 0xE0 && SR&SR_NEG && !(SR&SR_ZERO) && SR&SR_CARRY && !(SR&SR_OVER))) return -6;
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return 0;
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}
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int testAdcAbsoluteX() {
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X = 0x01; Y = 0x00;
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//no carry
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A = 0x00;
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SR &= (~SR_CARRY);
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ram[0] = 0x7D;
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ram[1] = 0x02;
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ram[2] = 0x00;
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ram[3] = 0x01;
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instructions = 1; run();
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if(!(A == 0x01 && !(SR&SR_NEG) && !(SR&SR_ZERO) && !(SR&SR_CARRY) && !(SR&SR_OVER))) return -1;
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//with carry
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A = 0x00;
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SR |= SR_CARRY;
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ram[0] = 0x7D;
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ram[1] = 0x02;
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ram[2] = 0x00;
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ram[3] = 0x01;
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instructions = 1; run();
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if(!(A == 0x02 && !(SR&SR_NEG) && !(SR&SR_ZERO) && !(SR&SR_CARRY) && !(SR&SR_OVER))) return -2;
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//negative result
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A = 0xFE;
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SR &= (~SR_CARRY);
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ram[0] = 0x7D;
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ram[1] = 0x02;
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ram[2] = 0x00;
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ram[3] = 0xFE;
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instructions = 1; run();
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if(!(A == 0xFC && SR&SR_NEG && !(SR&SR_ZERO) && SR&SR_CARRY && !(SR&SR_OVER))) return -3;
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//overflow result
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A = 0x80;
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SR &= (~SR_CARRY);
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ram[0] = 0x7D;
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ram[1] = 0x02;
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ram[2] = 0x00;
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ram[3] = 0xFF;
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instructions = 1; run();
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if(!(A == 0x7F && !(SR&SR_NEG) && !(SR&SR_ZERO) && SR&SR_CARRY && SR&SR_OVER)) return -4;
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//zero result
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A = 0xFF; //-1
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SR &= (~SR_CARRY);
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ram[0] = 0x7D;
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ram[1] = 0x02;
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ram[2] = 0x00;
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ram[3] = 0x01; //+1
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instructions = 1; run();
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if(!(A == 0x00 && !(SR&SR_NEG) && SR&SR_ZERO && SR&SR_CARRY && !(SR&SR_OVER))) return -5;
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//carry result
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A = 0xF0; //+70
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SR &= (~SR_CARRY);
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ram[0] = 0x7D;
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ram[1] = 0x02;
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ram[2] = 0x00;
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ram[3] = 0xF0; //+70
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instructions = 1; run();
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if(!(A == 0xE0 && SR&SR_NEG && !(SR&SR_ZERO) && SR&SR_CARRY && !(SR&SR_OVER))) return -6;
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return 0;
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}
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int testAdcAbsoluteY() {
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Y = 0x01; X = 0x00;
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//no carry
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A = 0x00;
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SR &= (~SR_CARRY);
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ram[0] = 0x79;
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ram[1] = 0x02;
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ram[2] = 0x00;
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ram[3] = 0x01;
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instructions = 1; run();
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if(!(A == 0x01 && !(SR&SR_NEG) && !(SR&SR_ZERO) && !(SR&SR_CARRY) && !(SR&SR_OVER))) return -1;
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//with carry
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A = 0x00;
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SR |= SR_CARRY;
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ram[0] = 0x79;
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ram[1] = 0x02;
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ram[2] = 0x00;
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ram[3] = 0x01;
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instructions = 1; run();
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if(!(A == 0x02 && !(SR&SR_NEG) && !(SR&SR_ZERO) && !(SR&SR_CARRY) && !(SR&SR_OVER))) return -2;
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//negative result
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A = 0xFE;
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SR &= (~SR_CARRY);
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ram[0] = 0x79;
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ram[1] = 0x02;
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ram[2] = 0x00;
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ram[3] = 0xFE;
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instructions = 1; run();
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if(!(A == 0xFC && SR&SR_NEG && !(SR&SR_ZERO) && SR&SR_CARRY && !(SR&SR_OVER))) return -3;
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//overflow result
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A = 0x80;
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SR &= (~SR_CARRY);
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ram[0] = 0x79;
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ram[1] = 0x02;
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ram[2] = 0x00;
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ram[3] = 0xFF;
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instructions = 1; run();
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if(!(A == 0x7F && !(SR&SR_NEG) && !(SR&SR_ZERO) && SR&SR_CARRY && SR&SR_OVER)) return -4;
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//zero result
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A = 0xFF; //-1
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SR &= (~SR_CARRY);
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ram[0] = 0x79;
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ram[1] = 0x02;
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ram[2] = 0x00;
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ram[3] = 0x01; //+1
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instructions = 1; run();
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if(!(A == 0x00 && !(SR&SR_NEG) && SR&SR_ZERO && SR&SR_CARRY && !(SR&SR_OVER))) return -5;
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//carry result
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A = 0xF0; //+70
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SR &= (~SR_CARRY);
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ram[0] = 0x79;
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ram[1] = 0x02;
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ram[2] = 0x00;
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ram[3] = 0xF0; //+70
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instructions = 1; run();
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if(!(A == 0xE0 && SR&SR_NEG && !(SR&SR_ZERO) && SR&SR_CARRY && !(SR&SR_OVER))) return -6;
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return 0;
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}
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int testAdcIndirectX() {
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X = 0x01; Y = 0x00;
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//no carry
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A = 0x00;
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SR &= (~SR_CARRY);
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ram[0] = 0x61;
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ram[1] = 0x02;
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ram[2] = 0x02;
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ram[3] = 0x01;
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instructions = 1; run();
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if(!(A == 0x01 && !(SR&SR_NEG) && !(SR&SR_ZERO) && !(SR&SR_CARRY) && !(SR&SR_OVER))) return -1;
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//with carry
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||
|
A = 0x00;
|
||
|
SR |= SR_CARRY;
|
||
|
ram[0] = 0x61;
|
||
|
ram[1] = 0x02;
|
||
|
ram[2] = 0x02;
|
||
|
ram[3] = 0x01;
|
||
|
instructions = 1; run();
|
||
|
if(!(A == 0x02 && !(SR&SR_NEG) && !(SR&SR_ZERO) && !(SR&SR_CARRY) && !(SR&SR_OVER))) return -2;
|
||
|
|
||
|
//negative result
|
||
|
A = 0xFE;
|
||
|
SR &= (~SR_CARRY);
|
||
|
ram[0] = 0x61;
|
||
|
ram[1] = 0x02;
|
||
|
ram[2] = 0x02;
|
||
|
ram[3] = 0xFE;
|
||
|
instructions = 1; run();
|
||
|
if(!(A == 0xFC && SR&SR_NEG && !(SR&SR_ZERO) && SR&SR_CARRY && !(SR&SR_OVER))) return -3;
|
||
|
|
||
|
//overflow result
|
||
|
A = 0x80;
|
||
|
SR &= (~SR_CARRY);
|
||
|
ram[0] = 0x61;
|
||
|
ram[1] = 0x02;
|
||
|
ram[2] = 0x02;
|
||
|
ram[3] = 0xFF;
|
||
|
instructions = 1; run();
|
||
|
if(!(A == 0x7F && !(SR&SR_NEG) && !(SR&SR_ZERO) && SR&SR_CARRY && SR&SR_OVER)) return -4;
|
||
|
|
||
|
//zero result
|
||
|
A = 0xFF; //-1
|
||
|
SR &= (~SR_CARRY);
|
||
|
ram[0] = 0x61;
|
||
|
ram[1] = 0x02;
|
||
|
ram[2] = 0x02;
|
||
|
ram[3] = 0x01; //+1
|
||
|
instructions = 1; run();
|
||
|
if(!(A == 0x00 && !(SR&SR_NEG) && SR&SR_ZERO && SR&SR_CARRY && !(SR&SR_OVER))) return -5;
|
||
|
|
||
|
//carry result
|
||
|
A = 0xF0; //+70
|
||
|
SR &= (~SR_CARRY);
|
||
|
ram[0] = 0x61;
|
||
|
ram[1] = 0x02;
|
||
|
ram[2] = 0x02;
|
||
|
ram[3] = 0xF0; //+70
|
||
|
instructions = 1; run();
|
||
|
if(!(A == 0xE0 && SR&SR_NEG && !(SR&SR_ZERO) && SR&SR_CARRY && !(SR&SR_OVER))) return -6;
|
||
|
|
||
|
return 0;
|
||
|
}
|
||
|
|
||
|
int testAdcIndirectY() {
|
||
|
Y = 0x01; X = 0x00;
|
||
|
|
||
|
//no carry
|
||
|
A = 0x00;
|
||
|
SR &= (~SR_CARRY);
|
||
|
ram[0] = 0x71;
|
||
|
ram[1] = 0x02;
|
||
|
ram[2] = 0x03;
|
||
|
ram[3] = 0x00;
|
||
|
ram[4] = 0x01;
|
||
|
instructions = 1; run();
|
||
|
if(!(A == 0x01 && !(SR&SR_NEG) && !(SR&SR_ZERO) && !(SR&SR_CARRY) && !(SR&SR_OVER))) return -1;
|
||
|
|
||
|
//with carry
|
||
|
A = 0x00;
|
||
|
SR |= SR_CARRY;
|
||
|
ram[0] = 0x71;
|
||
|
ram[1] = 0x02;
|
||
|
ram[2] = 0x03;
|
||
|
ram[3] = 0x00;
|
||
|
ram[4] = 0x01;
|
||
|
instructions = 1; run();
|
||
|
if(!(A == 0x02 && !(SR&SR_NEG) && !(SR&SR_ZERO) && !(SR&SR_CARRY) && !(SR&SR_OVER))) return -2;
|
||
|
|
||
|
//negative result
|
||
|
A = 0xFE;
|
||
|
SR &= (~SR_CARRY);
|
||
|
ram[0] = 0x71;
|
||
|
ram[1] = 0x02;
|
||
|
ram[2] = 0x03;
|
||
|
ram[3] = 0x00;
|
||
|
ram[4] = 0xFE;
|
||
|
instructions = 1; run();
|
||
|
if(!(A == 0xFC && SR&SR_NEG && !(SR&SR_ZERO) && SR&SR_CARRY && !(SR&SR_OVER))) return -3;
|
||
|
|
||
|
//overflow result
|
||
|
A = 0x80;
|
||
|
SR &= (~SR_CARRY);
|
||
|
ram[0] = 0x71;
|
||
|
ram[1] = 0x02;
|
||
|
ram[2] = 0x03;
|
||
|
ram[3] = 0x00;
|
||
|
ram[4] = 0xFF;
|
||
|
instructions = 1; run();
|
||
|
if(!(A == 0x7F && !(SR&SR_NEG) && !(SR&SR_ZERO) && SR&SR_CARRY && SR&SR_OVER)) return -4;
|
||
|
|
||
|
//zero result
|
||
|
A = 0xFF; //-1
|
||
|
SR &= (~SR_CARRY);
|
||
|
ram[0] = 0x71;
|
||
|
ram[1] = 0x02;
|
||
|
ram[2] = 0x03;
|
||
|
ram[3] = 0x00;
|
||
|
ram[4] = 0x01;
|
||
|
instructions = 1; run();
|
||
|
if(!(A == 0x00 && !(SR&SR_NEG) && SR&SR_ZERO && SR&SR_CARRY && !(SR&SR_OVER))) return -5;
|
||
|
|
||
|
//carry result
|
||
|
A = 0xF0; //+70
|
||
|
SR &= (~SR_CARRY);
|
||
|
ram[0] = 0x71;
|
||
|
ram[1] = 0x02;
|
||
|
ram[2] = 0x03;
|
||
|
ram[3] = 0x00;
|
||
|
ram[4] = 0xF0;
|
||
|
instructions = 1; run();
|
||
|
if(!(A == 0xE0 && SR&SR_NEG && !(SR&SR_ZERO) && SR&SR_CARRY && !(SR&SR_OVER))) return -6;
|
||
|
|
||
|
return 0;
|
||
|
}
|