fpga-disk-controller/lattice/fpgatop/liron_fpgatop_trce.asd

12 lines
230 B
Common Lisp

[ActiveSupport TRCE]
; Setup Analysis
Fmax_0 = 104.275 MHz (149.993 MHz);
Failed = 1 (Total 1);
Clock_ports = 2;
Clock_nets = 2;
; Hold Analysis
Fmax_0 = 0.307 ns (0.000 ns);
Failed = 0 (Total 1);
Clock_ports = 2;
Clock_nets = 2;