forked from Apple-2-HW/fpga-disk-controller
135 lines
6.1 KiB
Verilog
135 lines
6.1 KiB
Verilog
/* Verilog netlist generated by SCUBA Diamond (64-bit) 3.9.0.99.2 */
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/* Module Version: 1.2 */
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/* C:\lscc\diamond\3.9_x64\ispfpga\bin\nt64\scuba.exe -w -n spiFlash -lang verilog -synth lse -bus_exp 7 -bb -type efb -arch xo2c00 -freq 50 -spi -spi_mode Both -spi_freq 16.6 -spi_cs 1 -wb -dev 640 */
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/* Thu Jul 27 11:56:36 2017 */
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`timescale 1 ns / 1 ps
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module spiFlash (wb_clk_i, wb_rst_i, wb_cyc_i, wb_stb_i, wb_we_i,
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wb_adr_i, wb_dat_i, wb_dat_o, wb_ack_o, spi_clk, spi_miso, spi_mosi,
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spi_scsn, spi_csn)/* synthesis NGD_DRC_MASK=1 */;
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input wire wb_clk_i;
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input wire wb_rst_i;
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input wire wb_cyc_i;
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input wire wb_stb_i;
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input wire wb_we_i;
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input wire [7:0] wb_adr_i;
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input wire [7:0] wb_dat_i;
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input wire spi_scsn;
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output wire [7:0] wb_dat_o;
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output wire wb_ack_o;
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output wire [0:0] spi_csn;
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inout wire spi_clk;
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inout wire spi_miso;
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inout wire spi_mosi;
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wire scuba_vhi;
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wire spi_mosi_oe;
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wire spi_mosi_o;
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wire spi_miso_oe;
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wire spi_miso_o;
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wire spi_clk_oe;
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wire spi_clk_o;
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wire spi_mosi_i;
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wire spi_miso_i;
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wire spi_clk_i;
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wire scuba_vlo;
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VHI scuba_vhi_inst (.Z(scuba_vhi));
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BB BBspi_mosi (.I(spi_mosi_o), .T(spi_mosi_oe), .O(spi_mosi_i), .B(spi_mosi));
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BB BBspi_miso (.I(spi_miso_o), .T(spi_miso_oe), .O(spi_miso_i), .B(spi_miso));
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BB BBspi_clk (.I(spi_clk_o), .T(spi_clk_oe), .O(spi_clk_i), .B(spi_clk));
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VLO scuba_vlo_inst (.Z(scuba_vlo));
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defparam EFBInst_0.UFM_INIT_FILE_FORMAT = "HEX" ;
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defparam EFBInst_0.UFM_INIT_FILE_NAME = "NONE" ;
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defparam EFBInst_0.UFM_INIT_ALL_ZEROS = "ENABLED" ;
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defparam EFBInst_0.UFM_INIT_START_PAGE = 0 ;
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defparam EFBInst_0.UFM_INIT_PAGES = 0 ;
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defparam EFBInst_0.DEV_DENSITY = "640L" ;
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defparam EFBInst_0.EFB_UFM = "DISABLED" ;
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defparam EFBInst_0.TC_ICAPTURE = "DISABLED" ;
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defparam EFBInst_0.TC_OVERFLOW = "DISABLED" ;
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defparam EFBInst_0.TC_ICR_INT = "OFF" ;
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defparam EFBInst_0.TC_OCR_INT = "OFF" ;
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defparam EFBInst_0.TC_OV_INT = "OFF" ;
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defparam EFBInst_0.TC_TOP_SEL = "OFF" ;
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defparam EFBInst_0.TC_RESETN = "ENABLED" ;
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defparam EFBInst_0.TC_OC_MODE = "TOGGLE" ;
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defparam EFBInst_0.TC_OCR_SET = 32767 ;
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defparam EFBInst_0.TC_TOP_SET = 65535 ;
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defparam EFBInst_0.GSR = "ENABLED" ;
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defparam EFBInst_0.TC_CCLK_SEL = 1 ;
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defparam EFBInst_0.TC_MODE = "CTCM" ;
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defparam EFBInst_0.TC_SCLK_SEL = "PCLOCK" ;
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defparam EFBInst_0.EFB_TC_PORTMODE = "WB" ;
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defparam EFBInst_0.EFB_TC = "DISABLED" ;
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defparam EFBInst_0.SPI_WAKEUP = "DISABLED" ;
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defparam EFBInst_0.SPI_INTR_RXOVR = "DISABLED" ;
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defparam EFBInst_0.SPI_INTR_TXOVR = "DISABLED" ;
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defparam EFBInst_0.SPI_INTR_RXRDY = "DISABLED" ;
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defparam EFBInst_0.SPI_INTR_TXRDY = "DISABLED" ;
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defparam EFBInst_0.SPI_SLAVE_HANDSHAKE = "DISABLED" ;
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defparam EFBInst_0.SPI_PHASE_ADJ = "DISABLED" ;
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defparam EFBInst_0.SPI_CLK_INV = "DISABLED" ;
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defparam EFBInst_0.SPI_LSB_FIRST = "DISABLED" ;
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defparam EFBInst_0.SPI_CLK_DIVIDER = 3 ;
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defparam EFBInst_0.SPI_MODE = "BOTH" ;
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defparam EFBInst_0.EFB_SPI = "ENABLED" ;
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defparam EFBInst_0.I2C2_WAKEUP = "DISABLED" ;
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defparam EFBInst_0.I2C2_GEN_CALL = "DISABLED" ;
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defparam EFBInst_0.I2C2_CLK_DIVIDER = 1 ;
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defparam EFBInst_0.I2C2_BUS_PERF = "100kHz" ;
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defparam EFBInst_0.I2C2_SLAVE_ADDR = "0b1000010" ;
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defparam EFBInst_0.I2C2_ADDRESSING = "7BIT" ;
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defparam EFBInst_0.EFB_I2C2 = "DISABLED" ;
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defparam EFBInst_0.I2C1_WAKEUP = "DISABLED" ;
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defparam EFBInst_0.I2C1_GEN_CALL = "DISABLED" ;
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defparam EFBInst_0.I2C1_CLK_DIVIDER = 1 ;
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defparam EFBInst_0.I2C1_BUS_PERF = "100kHz" ;
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defparam EFBInst_0.I2C1_SLAVE_ADDR = "0b1000001" ;
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defparam EFBInst_0.I2C1_ADDRESSING = "7BIT" ;
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defparam EFBInst_0.EFB_I2C1 = "DISABLED" ;
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defparam EFBInst_0.EFB_WB_CLK_FREQ = "50.0" ;
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EFB EFBInst_0 (.WBCLKI(wb_clk_i), .WBRSTI(wb_rst_i), .WBCYCI(wb_cyc_i),
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.WBSTBI(wb_stb_i), .WBWEI(wb_we_i), .WBADRI7(wb_adr_i[7]), .WBADRI6(wb_adr_i[6]),
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.WBADRI5(wb_adr_i[5]), .WBADRI4(wb_adr_i[4]), .WBADRI3(wb_adr_i[3]),
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.WBADRI2(wb_adr_i[2]), .WBADRI1(wb_adr_i[1]), .WBADRI0(wb_adr_i[0]),
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.WBDATI7(wb_dat_i[7]), .WBDATI6(wb_dat_i[6]), .WBDATI5(wb_dat_i[5]),
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.WBDATI4(wb_dat_i[4]), .WBDATI3(wb_dat_i[3]), .WBDATI2(wb_dat_i[2]),
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.WBDATI1(wb_dat_i[1]), .WBDATI0(wb_dat_i[0]), .PLL0DATI7(scuba_vlo),
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.PLL0DATI6(scuba_vlo), .PLL0DATI5(scuba_vlo), .PLL0DATI4(scuba_vlo),
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.PLL0DATI3(scuba_vlo), .PLL0DATI2(scuba_vlo), .PLL0DATI1(scuba_vlo),
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.PLL0DATI0(scuba_vlo), .PLL0ACKI(scuba_vlo), .PLL1DATI7(scuba_vlo),
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.PLL1DATI6(scuba_vlo), .PLL1DATI5(scuba_vlo), .PLL1DATI4(scuba_vlo),
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.PLL1DATI3(scuba_vlo), .PLL1DATI2(scuba_vlo), .PLL1DATI1(scuba_vlo),
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.PLL1DATI0(scuba_vlo), .PLL1ACKI(scuba_vlo), .I2C1SCLI(scuba_vlo),
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.I2C1SDAI(scuba_vlo), .I2C2SCLI(scuba_vlo), .I2C2SDAI(scuba_vlo),
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.SPISCKI(spi_clk_i), .SPIMISOI(spi_miso_i), .SPIMOSII(spi_mosi_i),
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.SPISCSN(spi_scsn), .TCCLKI(scuba_vlo), .TCRSTN(scuba_vlo), .TCIC(scuba_vlo),
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.UFMSN(scuba_vhi), .WBDATO7(wb_dat_o[7]), .WBDATO6(wb_dat_o[6]),
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.WBDATO5(wb_dat_o[5]), .WBDATO4(wb_dat_o[4]), .WBDATO3(wb_dat_o[3]),
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.WBDATO2(wb_dat_o[2]), .WBDATO1(wb_dat_o[1]), .WBDATO0(wb_dat_o[0]),
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.WBACKO(wb_ack_o), .PLLCLKO(), .PLLRSTO(), .PLL0STBO(), .PLL1STBO(),
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.PLLWEO(), .PLLADRO4(), .PLLADRO3(), .PLLADRO2(), .PLLADRO1(), .PLLADRO0(),
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.PLLDATO7(), .PLLDATO6(), .PLLDATO5(), .PLLDATO4(), .PLLDATO3(),
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.PLLDATO2(), .PLLDATO1(), .PLLDATO0(), .I2C1SCLO(), .I2C1SCLOEN(),
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.I2C1SDAO(), .I2C1SDAOEN(), .I2C2SCLO(), .I2C2SCLOEN(), .I2C2SDAO(),
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.I2C2SDAOEN(), .I2C1IRQO(), .I2C2IRQO(), .SPISCKO(spi_clk_o), .SPISCKEN(spi_clk_oe),
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.SPIMISOO(spi_miso_o), .SPIMISOEN(spi_miso_oe), .SPIMOSIO(spi_mosi_o),
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.SPIMOSIEN(spi_mosi_oe), .SPIMCSN7(), .SPIMCSN6(), .SPIMCSN5(),
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.SPIMCSN4(), .SPIMCSN3(), .SPIMCSN2(), .SPIMCSN1(), .SPIMCSN0(spi_csn[0]),
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.SPICSNEN(), .SPIIRQO(), .TCINT(), .TCOC(), .WBCUFMIRQ(), .CFGWAKE(),
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.CFGSTDBY());
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// exemplar begin
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// exemplar end
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endmodule
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