fpga-disk-controller/yellowstone_blink/yellowstone_blink_yellowstone_blink.arearep
steve-chamberlin 31488767c7 initial commit
2019-01-30 12:55:46 -08:00

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Report for cell blink.TECH
Register bits: 21 of 1520 (1.382%)
I/O cells: 2
Cell usage:
cell count Res Usage(%)
CCU2D 11 100.0
FD1S3AX 21 100.0
GSR 1 100.0
OB 2 100.0
OSCH 1 100.0
TOTAL 36