2021-05-07 05:11:12 +00:00
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#ifndef INC_6502_CPP_OPTIMIZER_HPP
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#define INC_6502_CPP_OPTIMIZER_HPP
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#include "6502.hpp"
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#include <vector>
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bool optimize(std::vector<mos6502> &instructions)
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{
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2021-05-09 23:31:44 +00:00
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// return false;
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2021-05-07 05:11:12 +00:00
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if (instructions.size() < 2) {
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return false;
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}
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const auto next_instruction = [&instructions](auto i) {
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do {
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++i;
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} while (i < instructions.size() && instructions[i].type == ASMLine::Type::Directive);
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return i;
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};
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// remove unused flag-fix-up blocks
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// it might make sense in the future to only insert these if determined they are needed?
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for (size_t op = 10; op < instructions.size(); ++op) {
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if (instructions[op].opcode == mos6502::OpCode::lda) {
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if (instructions[op - 1].text == "; END remove if next is lda") {
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for (size_t inner_op = op - 1; inner_op > 1; --inner_op) {
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instructions[inner_op] = mos6502(ASMLine::Type::Directive,
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"; removed unused flag fix-up: " + instructions[inner_op].to_string());
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if (instructions[inner_op].text.find("; BEGIN") != std::string::npos) {
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return true;
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}
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}
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}
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}
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}
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// look for redundant load of lda after a tax
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for (size_t op = 0; op < instructions.size() - 3; ++op) {
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if (instructions[op].opcode == mos6502::OpCode::sta
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&& instructions[op + 1].opcode == mos6502::OpCode::tax
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&& instructions[op + 2].opcode == mos6502::OpCode::lda
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&& instructions[op].op.value == instructions[op + 2].op.value) {
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instructions[op + 2] = mos6502(ASMLine::Type::Directive, "; removed redundant lda: " + instructions[op + 2].to_string());
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return true;
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}
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}
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// look for redundant stores to 0-page registers with sta
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for (size_t op = 0; op < instructions.size(); ++op) {
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// todo, make sure this is in the register map
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if (instructions[op].opcode == mos6502::OpCode::sta
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&& instructions[op].op.value.size() == 3) {
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for (size_t next_op = op + 1; next_op < instructions.size(); ++next_op) {
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if (instructions[next_op].opcode != mos6502::OpCode::sta && instructions[next_op].op.value == instructions[op].op.value) {
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// we just found a use of ourselves back, abort the search, there's probably something else going on
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break;
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}
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if (instructions[next_op].opcode == mos6502::OpCode::lda && instructions[next_op].op.value != instructions[op].op.value) {
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// someone just loaded lda with a different value, so we need to abort!
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break;
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}
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// abort at label
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if (instructions[next_op].type == ASMLine::Type::Label) {
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break;
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}
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if (instructions[next_op].opcode == mos6502::OpCode::sta
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&& instructions[next_op].op.value == instructions[op].op.value) {
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// looks like we found a redundant store, remove the first one
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instructions[op] = mos6502(ASMLine::Type::Directive,
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"; removed redundant sta: " + instructions[op].to_string());
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return true;
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}
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}
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}
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}
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for (size_t op = 0; op < instructions.size() - 1; ++op) {
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// look for a transfer of Y -> A immediately followed by A -> Y
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if (instructions[op].opcode == mos6502::OpCode::tya) {
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next_instruction(op);
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if (instructions[op].opcode == mos6502::OpCode::tay) {
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instructions[op] = mos6502(ASMLine::Type::Directive,
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"; removed redundant tay: " + instructions[op].to_string());
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return true;
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}
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}
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}
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for (size_t op = 0; op < instructions.size() - 1; ++op) {
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// look for a store A -> loc immediately followed by loc -> A
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if (instructions[op].opcode == mos6502::OpCode::sta) {
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const auto next = next_instruction(op);
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if (instructions[next].opcode == mos6502::OpCode::lda
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&& instructions[next].op == instructions[op].op) {
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instructions[next] = mos6502(ASMLine::Type::Directive,
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"; removed redundant lda: " + instructions[next].to_string());
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return true;
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}
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}
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}
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2021-05-09 04:58:55 +00:00
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// todo: fix this ldy redundant move, right now it doesn't
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// take into account if Y has been used
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/*
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2021-05-07 05:11:12 +00:00
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for (size_t op = 0; op < instructions.size() - 1; ++op) {
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if (instructions[op].opcode == mos6502::OpCode::ldy && instructions[op].op.type == Operand::Type::literal) {
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auto op2 = op + 1;
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while (op2 < instructions.size() && (instructions[op2].type != ASMLine::Type::Label)) {
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// while inside this label
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if (instructions[op2].opcode == mos6502::OpCode::ldy && instructions[op2].op.value == instructions[op].op.value) {
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instructions[op2] = mos6502(ASMLine::Type::Directive, "; removed redundant ldy: " + instructions[op2].to_string());
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return true;
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}
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++op2;
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}
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}
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2021-05-09 04:58:55 +00:00
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}
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*/
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2021-05-07 05:11:12 +00:00
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for (size_t op = 0; op < instructions.size() - 1; ++op) {
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if (instructions[op].opcode == mos6502::OpCode::lda
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&& instructions[op].op.type == Operand::Type::literal) {
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const auto operand = instructions[op].op;
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auto op2 = op + 1;
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// look for multiple stores of the same value
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while (op2 < instructions.size() && (instructions[op2].opcode == mos6502::OpCode::sta || instructions[op2].type == ASMLine::Type::Directive)) {
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++op2;
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}
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if (instructions[op2].opcode == mos6502::OpCode::lda
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&& operand == instructions[op2].op) {
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instructions[op2] = mos6502(ASMLine::Type::Directive,
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"; removed redundant lda: " + instructions[op2].to_string());
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return true;
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}
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}
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}
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return false;
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}
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#endif//INC_6502_CPP_OPTIMIZER_HPP
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