mirror of
https://github.com/lefticus/6502-cpp.git
synced 2025-04-18 14:40:28 +00:00
Updates to work better with compiler explorer
yy
This commit is contained in:
Jason Turner
parent
974c907a3b
commit
622354e6b2
93
src/main.cpp
93
src/main.cpp
@ -67,9 +67,9 @@ struct Operand
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Operand get_register(int reg_num) {
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switch (reg_num) {
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case 2: return Operand(Operand::Type::literal, "$fb");
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case 3: return Operand(Operand::Type::literal, "$fc");
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case 4: return Operand(Operand::Type::literal, "$fd");
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case 1: return Operand(Operand::Type::literal, "$fb");
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case 2: return Operand(Operand::Type::literal, "$fc");
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case 3: return Operand(Operand::Type::literal, "$fd");
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};
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throw std::runtime_error("Cannot translate instruction");
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}
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@ -353,20 +353,16 @@ struct i386 : ASMLine
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}
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if (o[0] == '%') {
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if (o == "%eax") {
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if (o == "%al" || o == "%eax") {
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return Operand(Operand::Type::reg, 0);
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} else if (o == "%bl" || o == "%ebx") {
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return Operand(Operand::Type::reg, 1);
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} else if (o == "%al") {
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return Operand(Operand::Type::reg, 1);
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} else if (o == "%edx") {
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return Operand(Operand::Type::reg, 4);
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} else if (o == "%dl") {
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return Operand(Operand::Type::reg, 4);
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} else if (o == "%cl" || o == "%ecx") {
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return Operand(Operand::Type::reg, 2);
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} else if (o == "%dl" || o == "%edx") {
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return Operand(Operand::Type::reg, 3);
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} else if (o == "%di") {
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return Operand(Operand::Type::reg, 6);
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} else if (o == "%cl" || o == "%ecx") {
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return Operand(Operand::Type::reg, 3);
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} else if (o == "%bl" || o == "%ebx") {
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return Operand(Operand::Type::reg, 2);
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} else {
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throw std::runtime_error("Unknown register operand: '" + o + "'");
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}
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@ -399,14 +395,14 @@ void translate_instruction(std::vector<mos6502> &instructions, const i386::OpCod
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if (o1.type == Operand::Type::literal && o2.type == Operand::Type::literal) {
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instructions.emplace_back(mos6502::OpCode::ldy, Operand(o1.type, fixup_8bit_literal(o1.value)));
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instructions.emplace_back(mos6502::OpCode::sty, o2);
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} else if (o1.type == Operand::Type::literal && o2.type == Operand::Type::reg && o2.reg_num == 1) {
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} else if (o1.type == Operand::Type::literal && o2.type == Operand::Type::reg && o2.reg_num == 0) {
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instructions.emplace_back(mos6502::OpCode::lda, o1);
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} else if (o1.type == Operand::Type::literal && o2.type == Operand::Type::reg) {
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instructions.emplace_back(mos6502::OpCode::ldy, Operand(o1.type, fixup_8bit_literal(o1.value)));
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instructions.emplace_back(mos6502::OpCode::sty, get_register(o2.reg_num));
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} else if (o1.type == Operand::Type::reg && o1.reg_num == 1 && o2.type == Operand::Type::reg) {
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} else if (o1.type == Operand::Type::reg && o1.reg_num == 0 && o2.type == Operand::Type::reg) {
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instructions.emplace_back(mos6502::OpCode::sta, get_register(o2.reg_num));
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} else if (o1.type == Operand::Type::reg && o1.reg_num == 1 && o2.type == Operand::Type::literal) {
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} else if (o1.type == Operand::Type::reg && o1.reg_num == 0 && o2.type == Operand::Type::literal) {
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instructions.emplace_back(mos6502::OpCode::sta, o2);
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} else if (o1.type == Operand::Type::reg && o2.type == Operand::Type::literal) {
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instructions.emplace_back(mos6502::OpCode::ldy, get_register(o1.reg_num));
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@ -416,7 +412,7 @@ void translate_instruction(std::vector<mos6502> &instructions, const i386::OpCod
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}
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break;
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case i386::OpCode::movl:
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if (o1.type == Operand::Type::reg && o1.reg_num == 1 && o2.type == Operand::Type::reg) {
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if (o1.type == Operand::Type::reg && o1.reg_num == 0 && o2.type == Operand::Type::reg) {
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instructions.emplace_back(mos6502::OpCode::sta, get_register(o2.reg_num));
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} else {
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throw std::runtime_error("Cannot translate instruction");
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@ -425,12 +421,12 @@ void translate_instruction(std::vector<mos6502> &instructions, const i386::OpCod
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case i386::OpCode::orb:
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case i386::OpCode::orl:
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if (o1.type == Operand::Type::literal && o2.type == Operand::Type::literal) {
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instructions.emplace_back(mos6502::OpCode::pha); // transfer memory through A register, pushing and popping around it
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instructions.emplace_back(mos6502::OpCode::tay); // transfer memory through A register, pushing and popping around it
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instructions.emplace_back(mos6502::OpCode::lda, Operand(o1.type, fixup_8bit_literal(o1.value)));
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instructions.emplace_back(mos6502::OpCode::ORA, o2);
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instructions.emplace_back(mos6502::OpCode::sta, o2);
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instructions.emplace_back(mos6502::OpCode::pla);
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} else if (o1.type == Operand::Type::literal && o2.type == Operand::Type::reg && o2.reg_num == 1) {
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instructions.emplace_back(mos6502::OpCode::tya);
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} else if (o1.type == Operand::Type::literal && o2.type == Operand::Type::reg && o2.reg_num == 0) {
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instructions.emplace_back(mos6502::OpCode::ORA, Operand(o1.type, fixup_8bit_literal(o1.value)));
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} else {
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throw std::runtime_error("Cannot translate instruction");
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@ -438,7 +434,7 @@ void translate_instruction(std::vector<mos6502> &instructions, const i386::OpCod
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break;
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case i386::OpCode::movzbl:
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if (o1.type == Operand::Type::literal && o2.type == Operand::Type::reg && o2.reg_num == 1) {
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if (o1.type == Operand::Type::literal && o2.type == Operand::Type::reg && o2.reg_num == 0) {
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instructions.emplace_back(mos6502::OpCode::lda, o1);
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} else if (o1.type == Operand::Type::literal && o2.type == Operand::Type::reg) {
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instructions.emplace_back(mos6502::OpCode::ldy, o1);
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@ -451,7 +447,7 @@ void translate_instruction(std::vector<mos6502> &instructions, const i386::OpCod
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case i386::OpCode::shrb:
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if (o1.type == Operand::Type::reg || o2.type == Operand::Type::reg) {
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const auto do_shift = [&instructions](const int reg_num) {
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if (reg_num == 1) {
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if (reg_num == 0) {
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instructions.emplace_back(mos6502::OpCode::lsr, Operand(Operand::Type::literal, "a"));
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} else {
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instructions.emplace_back(mos6502::OpCode::lsr, get_register(reg_num));
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@ -471,7 +467,7 @@ void translate_instruction(std::vector<mos6502> &instructions, const i386::OpCod
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}
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break;
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case i386::OpCode::testb:
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if (o1.type == Operand::Type::literal && o2.type == Operand::Type::reg && o2.reg_num == 1) {
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if (o1.type == Operand::Type::literal && o2.type == Operand::Type::reg && o2.reg_num == 0) {
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instructions.emplace_back(mos6502::OpCode::pha);
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instructions.emplace_back(mos6502::OpCode::AND, Operand(o1.type, fixup_8bit_literal(o1.value)));
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instructions.emplace_back(mos6502::OpCode::tay);
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@ -480,7 +476,7 @@ void translate_instruction(std::vector<mos6502> &instructions, const i386::OpCod
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// instructions.emplace_back(mos6502::OpCode::cmp, Operand(Operand::Type::literal, "#$0"));
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} else if (o1.type == Operand::Type::reg && o1.reg_num == 1 && o2.type == Operand::Type::reg && o2.reg_num == 1) {
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} else if (o1.type == Operand::Type::reg && o1.reg_num == 0 && o2.type == Operand::Type::reg && o2.reg_num == 0) {
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//transfer A to Y, to set the status flags appropriately
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instructions.emplace_back(mos6502::OpCode::tay);
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} else if (o1.type == Operand::Type::reg && o2.type == Operand::Type::reg && o1.reg_num == o2.reg_num) {
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@ -491,7 +487,7 @@ void translate_instruction(std::vector<mos6502> &instructions, const i386::OpCod
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break;
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case i386::OpCode::decb:
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case i386::OpCode::decl:
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if (o1.type == Operand::Type::reg && o1.reg_num == 1) {
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if (o1.type == Operand::Type::reg && o1.reg_num == 0) {
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instructions.emplace_back(mos6502::OpCode::sbc, Operand(Operand::Type::literal, "#1"));
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} else if (o1.type == Operand::Type::reg) {
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instructions.emplace_back(mos6502::OpCode::dec, get_register(o1.reg_num));
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@ -501,7 +497,7 @@ void translate_instruction(std::vector<mos6502> &instructions, const i386::OpCod
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break;
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case i386::OpCode::incb:
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case i386::OpCode::incl:
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if (o1.type == Operand::Type::reg && o1.reg_num == 1) {
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if (o1.type == Operand::Type::reg && o1.reg_num == 0) {
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instructions.emplace_back(mos6502::OpCode::adc, Operand(Operand::Type::literal, "#1"));
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} else if (o1.type == Operand::Type::reg) {
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instructions.emplace_back(mos6502::OpCode::inc, get_register(o1.reg_num));
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@ -522,9 +518,9 @@ void translate_instruction(std::vector<mos6502> &instructions, const i386::OpCod
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instructions.emplace_back(mos6502::OpCode::jmp, o1);
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break;
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case i386::OpCode::xorl:
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if (o1.type == Operand::Type::literal && o2.type == Operand::Type::reg && o2.reg_num == 1) {
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if (o1.type == Operand::Type::literal && o2.type == Operand::Type::reg && o2.reg_num == 0) {
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instructions.emplace_back(mos6502::OpCode::eor, Operand(o1.type, fixup_8bit_literal(o1.value)));
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} else if (o1.type == Operand::Type::reg && o2.reg_num == 1 && o2.type == Operand::Type::reg && o2.reg_num == 1) {
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} else if (o1.type == Operand::Type::reg && o2.reg_num == 0 && o2.type == Operand::Type::reg && o2.reg_num == 0) {
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// cheater shortcut on x86 to 0 out a register
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instructions.emplace_back(mos6502::OpCode::lda, Operand(Operand::Type::literal, "#0"));
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} else if (o1.type == Operand::Type::reg && o2.type == Operand::Type::reg && o1.reg_num == o2.reg_num) {
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@ -532,32 +528,32 @@ void translate_instruction(std::vector<mos6502> &instructions, const i386::OpCod
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instructions.emplace_back(mos6502::OpCode::ldy, Operand(Operand::Type::literal, "#0"));
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instructions.emplace_back(mos6502::OpCode::sty, get_register(o1.reg_num));
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} else if (o1.type == Operand::Type::literal && o2.type == Operand::Type::reg) {
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instructions.emplace_back(mos6502::OpCode::pha); // transfer memory through A register, pushing and popping around it
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instructions.emplace_back(mos6502::OpCode::tay); // transfer memory through A register, pushing and popping around it
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instructions.emplace_back(mos6502::OpCode::lda, get_register(o2.reg_num));
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instructions.emplace_back(mos6502::OpCode::eor, Operand(o1.type, fixup_8bit_literal(o1.value)));
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instructions.emplace_back(mos6502::OpCode::sta, get_register(o2.reg_num));
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instructions.emplace_back(mos6502::OpCode::pla);
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instructions.emplace_back(mos6502::OpCode::tya);
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} else {
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throw std::runtime_error("Cannot translate instruction");
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}
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break;
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case i386::OpCode::addl:
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if (o1.type == Operand::Type::literal && o2.type == Operand::Type::reg && o2.reg_num == 1) {
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if (o1.type == Operand::Type::literal && o2.type == Operand::Type::reg && o2.reg_num == 0) {
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instructions.emplace_back(mos6502::OpCode::adc, Operand(o1.type, fixup_8bit_literal(o1.value)));
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} else if (o1.type == Operand::Type::literal && o2.type == Operand::Type::reg) {
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instructions.emplace_back(mos6502::OpCode::pha); // transfer memory through A register, pushing and popping around it
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instructions.emplace_back(mos6502::OpCode::tay); // transfer memory through A register, pushing and popping around it
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instructions.emplace_back(mos6502::OpCode::lda, get_register(o2.reg_num));
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instructions.emplace_back(mos6502::OpCode::adc, Operand(o1.type, fixup_8bit_literal(o1.value)));
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instructions.emplace_back(mos6502::OpCode::sta, get_register(o2.reg_num));
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instructions.emplace_back(mos6502::OpCode::pla);
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instructions.emplace_back(mos6502::OpCode::tya);
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} else {
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throw std::runtime_error("Cannot translate instruction");
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}
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break;
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case i386::OpCode::cmpb:
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if (o1.type == Operand::Type::reg && o1.reg_num == 1 && o2.type == Operand::Type::reg && o2.reg_num == 4) {
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if (o1.type == Operand::Type::reg && o1.reg_num == 0 && o2.type == Operand::Type::reg) {
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instructions.emplace_back(mos6502::OpCode::cmp, get_register(o2.reg_num));
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} else if (o1.type == Operand::Type::literal && o2.type == Operand::Type::reg && o2.reg_num == 1) {
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} else if (o1.type == Operand::Type::literal && o2.type == Operand::Type::reg && o2.reg_num == 0) {
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instructions.emplace_back(mos6502::OpCode::cmp, Operand(o1.type, fixup_8bit_literal(o1.value)));
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} else if (o1.type == Operand::Type::literal && o2.type == Operand::Type::literal) {
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instructions.emplace_back(mos6502::OpCode::ldy, o2);
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@ -570,7 +566,7 @@ void translate_instruction(std::vector<mos6502> &instructions, const i386::OpCod
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break;
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case i386::OpCode::andb:
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case i386::OpCode::andl:
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if (o1.type == Operand::Type::literal && o2.type == Operand::Type::reg && o2.reg_num == 1) {
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if (o1.type == Operand::Type::literal && o2.type == Operand::Type::reg && o2.reg_num == 0) {
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instructions.emplace_back(mos6502::OpCode::AND, Operand(o1.type, fixup_8bit_literal(o1.value)));
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} else if (o1.type == Operand::Type::literal && o2.type == Operand::Type::reg) {
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const auto reg = get_register(o2.reg_num);
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@ -584,7 +580,7 @@ void translate_instruction(std::vector<mos6502> &instructions, const i386::OpCod
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}
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break;
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case i386::OpCode::subl:
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if (o1.type == Operand::Type::literal && o2.type == Operand::Type::reg && o2.reg_num == 1) {
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if (o1.type == Operand::Type::literal && o2.type == Operand::Type::reg && o2.reg_num == 0) {
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instructions.emplace_back(mos6502::OpCode::sbc, Operand(o1.type, fixup_8bit_literal(o1.value)));
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} else {
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throw std::runtime_error("Cannot translate instruction");
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@ -617,12 +613,12 @@ std::string to_string(const LogLevel ll)
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void log(LogLevel ll, const i386 &i, const std::string &message)
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{
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std::cerr << i.line_num << ": " << to_string(ll) << ": " << message << ": `" << i.line_text << "`\n";
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std::cout << to_string(ll) << ": " << i.line_num << ": " << message << ": `" << i.line_text << "`\n";
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}
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void log(LogLevel ll, const int line_no, const std::string &line, const std::string &message)
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{
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std::cerr << line_no << ": " << to_string(ll) << ": " << message << ": `" << line << "`\n";
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std::cout << to_string(ll) << ": " << line_no << ": " << message << ": `" << line << "`\n";
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}
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void to_mos6502(const i386 &i, std::vector<mos6502> &instructions)
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@ -634,7 +630,8 @@ void to_mos6502(const i386 &i, std::vector<mos6502> &instructions)
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instructions.emplace_back(i.type, i.text);
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return;
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case ASMLine::Type::Directive:
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throw std::runtime_error("Directives not understood during translation");
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instructions.emplace_back(i.type, i.text);
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return;
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case ASMLine::Type::Instruction:
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translate_instruction(instructions, i.opcode, i.operand1, i.operand2);
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return;
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@ -652,10 +649,10 @@ bool optimize(std::vector<mos6502> &instructions)
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for (size_t op = 0; op < instructions.size() - 1; ++op)
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{
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if (instructions[op].opcode == mos6502::OpCode::pla
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&& instructions[op+1].opcode == mos6502::OpCode::pha)
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if (instructions[op].opcode == mos6502::OpCode::tya
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&& instructions[op+1].opcode == mos6502::OpCode::tay)
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{
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instructions.erase(std::next(std::begin(instructions), op), std::next(std::begin(instructions), op+2));
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instructions.erase(std::next(std::begin(instructions), op + 1), std::next(std::begin(instructions), op+2));
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return true;
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}
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}
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@ -771,7 +768,7 @@ int main()
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instructions.erase(
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std::remove_if(std::begin(instructions), std::end(instructions),
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[&used_labels](const auto &i){
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if (i.type == ASMLine::Type::Directive) return true;
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// if (i.type == ASMLine::Type::Directive) return true;
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if (i.type == ASMLine::Type::Label) {
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if (used_labels.count(i.text) == 0) {
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// remove all unused labels that aren't 'main'
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@ -788,6 +785,7 @@ int main()
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// remove everything up to the first label
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// this will probably leave some dead code around at some point
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// but it's a start
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/*
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instructions.erase(
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std::begin(instructions),
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std::find_if(std::begin(instructions),
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@ -795,6 +793,7 @@ int main()
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[](const auto &i){ return i.type == ASMLine::Type::Label; }
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)
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);
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*/
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const auto new_labels =
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[&used_labels](){
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@ -803,7 +802,7 @@ int main()
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auto newl = l;
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std::transform(newl.begin(), newl.end(), newl.begin(), [](const auto c) { return std::tolower(c); });
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newl.erase(std::remove_if(newl.begin(), newl.end(), [](const auto c){ return !std::isalnum(c); }), std::end(newl));
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std::cout << "Old label: '" << l << "' new label: '" << newl << "'\n";
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// std::cout << "Old label: '" << l << "' new label: '" << newl << "'\n";
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result.emplace(std::make_pair(l, newl));
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}
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return result;
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@ -820,7 +819,7 @@ int main()
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{
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if (i.type == ASMLine::Type::Label)
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{
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std::cout << "Updating label " << i.text << '\n';;
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// std::cout << "Updating label " << i.text << '\n';;
|
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i.text = new_labels.at(i.text);
|
||||
}
|
||||
|
||||
|
||||
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Reference in New Issue
Block a user