mirror of
https://github.com/lefticus/6502-cpp.git
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More multi-byte operations working
This commit is contained in:
Jason Turner
parent
51c5767f0e
commit
b0980ac10a
209
src/main.cpp
209
src/main.cpp
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@ -51,9 +51,13 @@ std::string fixup_8bit_literal(const std::string &s)
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if (s.starts_with("hi8(") && s.ends_with(")")) {
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return "#>" + strip_lo_hi(s);
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}
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// todo make this a generic number check
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if (s == "0") {
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return "#0";
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}
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if (s == "1") {
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return "#1";
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}
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return s;
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}
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@ -121,6 +125,7 @@ struct mos6502 : ASMLine
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bne,
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beq,
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bmi,
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bpl,
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jmp,
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adc,
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sbc,
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@ -136,6 +141,7 @@ struct mos6502 : ASMLine
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case OpCode::beq:
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case OpCode::bne:
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case OpCode::bmi:
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case OpCode::bpl:
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return true;
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case OpCode::lda:
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case OpCode::ldy:
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@ -296,6 +302,8 @@ struct mos6502 : ASMLine
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return "bit";
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case OpCode::jsr:
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return "jsr";
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case OpCode::bpl:
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return "bpl";
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case OpCode::unknown:
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return "";
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};
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@ -521,6 +529,7 @@ struct AVR : ASMLine
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rcall,
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ld,
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subi,
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sbci,
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st,
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lds,
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lsr,
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@ -530,7 +539,8 @@ struct AVR : ASMLine
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sbrs,
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brne,
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rjmp,
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dec
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dec,
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sbiw
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};
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static OpCode parse_opcode(Type t, const std::string &o)
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@ -552,6 +562,7 @@ struct AVR : ASMLine
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if (o == "rcall") return OpCode::rcall;
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if (o == "ld") return OpCode::ld;
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if (o == "subi") return OpCode::subi;
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if (o == "sbci") return OpCode::sbci;
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if (o == "st") return OpCode::st;
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if (o == "lds") return OpCode::lds;
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if (o == "lsr") return OpCode::lsr;
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@ -562,6 +573,7 @@ struct AVR : ASMLine
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if (o == "sbrs") return OpCode::sbrs;
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if (o == "brne") return OpCode::brne;
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if (o == "dec") return OpCode::dec;
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if (o == "sbiw") return OpCode::sbiw;
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}
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}
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throw std::runtime_error("Unknown opcode: " + o);
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@ -669,6 +681,40 @@ void indirect_store(std::vector<mos6502> &instructions, const std::string &from_
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"(" + to_address_low_byte + "), Y") );
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}
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void fixup_16_bit_N_Z_flags(std::vector<mos6502> &instructions)
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{
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// need to get both Z and N set appropriately
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// assuming A contains higher order byte and Y contains lower order byte
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// todo, abstract this out so it can be used after any 16 bit op
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instructions.emplace_back(ASMLine::Type::Directive, "; set CPU flags assuming A holds the higher order byte already");
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std::string set_flag_label = "flags_set_after_16_bit_op_" + std::to_string(instructions.size());
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// if high order is negative, we know it's not 0 and it is negative
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instructions.emplace_back(mos6502::OpCode::bmi, Operand(Operand::Type::literal, set_flag_label));
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// if it's not 0, then branch down, we know the result is not 0 and not negative
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instructions.emplace_back(mos6502::OpCode::bne, Operand(Operand::Type::literal, set_flag_label));
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// if the higher order byte is 0, test the lower order byte, which was saved for us in Y
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instructions.emplace_back(mos6502::OpCode::tya);
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// if low order is not negative, we know it's 0 or not 0
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instructions.emplace_back(mos6502::OpCode::bpl, Operand(Operand::Type::literal, set_flag_label));
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// if low order byte is negative, shift right by one bit, then we'll get the proper Z/N flags
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instructions.emplace_back(mos6502::OpCode::lsr);
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instructions.emplace_back(ASMLine::Type::Label, set_flag_label);
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}
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void subtract_16_bit(std::vector<mos6502> &instructions, int reg, const std::uint16_t value) {
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//instructions.emplace_back(mos6502::OpCode::sta, Operand(Operand::Type::literal, address_low_byte));
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instructions.emplace_back(mos6502::OpCode::sec);
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instructions.emplace_back(mos6502::OpCode::lda, AVR::get_register(reg));
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instructions.emplace_back(mos6502::OpCode::sbc, Operand(Operand::Type::literal, "#" + std::to_string(value & 0xFF)));
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instructions.emplace_back(mos6502::OpCode::sta, AVR::get_register(reg));
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instructions.emplace_back(mos6502::OpCode::lda, AVR::get_register(reg + 1));
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instructions.emplace_back(mos6502::OpCode::sbc, Operand(Operand::Type::literal, "#" + std::to_string((value >> 8) & 0xFF)));
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instructions.emplace_back(mos6502::OpCode::sta, AVR::get_register(reg + 1));
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instructions.emplace_back(mos6502::OpCode::tay);
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fixup_16_bit_N_Z_flags(instructions);
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}
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void increment_16_bit(std::vector<mos6502> & instructions, int reg) {
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//instructions.emplace_back(mos6502::OpCode::sta, Operand(Operand::Type::literal, address_low_byte));
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@ -679,76 +725,104 @@ void increment_16_bit(std::vector<mos6502> & instructions, int reg) {
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instructions.emplace_back(mos6502::OpCode::lda, AVR::get_register(reg+1));
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instructions.emplace_back(mos6502::OpCode::adc, Operand(Operand::Type::literal, "#0"));
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instructions.emplace_back(mos6502::OpCode::sta, AVR::get_register(reg+1));
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}
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void translate_instruction(std::vector<mos6502> &instructions, const AVR::OpCode op, const Operand &o1, const Operand &o2)
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{
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const auto translate_register_number = [](const Operand ®) {
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if (reg.value == "__zero_reg__") {
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return 1;
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} else {
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return reg.reg_num;
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}
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};
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const auto o1_reg_num = translate_register_number(o1);
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const auto o2_reg_num = translate_register_number(o2);
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switch(op)
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{
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case AVR::OpCode::dec:
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instructions.emplace_back(mos6502::OpCode::dec, AVR::get_register(o1.reg_num));
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instructions.emplace_back(mos6502::OpCode::dec, AVR::get_register(o1_reg_num));
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return;
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case AVR::OpCode::ldi:
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instructions.emplace_back(mos6502::OpCode::lda, Operand(o2.type, fixup_8bit_literal(o2.value)));
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instructions.emplace_back(mos6502::OpCode::sta, AVR::get_register(o1.reg_num));
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instructions.emplace_back(mos6502::OpCode::sta, AVR::get_register(o1_reg_num));
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return;
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case AVR::OpCode::sts:
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instructions.emplace_back(mos6502::OpCode::lda, AVR::get_register(o2.reg_num));
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instructions.emplace_back(mos6502::OpCode::lda, AVR::get_register(o2_reg_num));
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instructions.emplace_back(mos6502::OpCode::sta, Operand(o1.type, o1.value));
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return;
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case AVR::OpCode::ret:
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instructions.emplace_back(mos6502::OpCode::rts);
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return;
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case AVR::OpCode::mov:
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instructions.emplace_back(mos6502::OpCode::lda, AVR::get_register(o2.reg_num));
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instructions.emplace_back(mos6502::OpCode::sta, AVR::get_register(o1.reg_num));
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instructions.emplace_back(mos6502::OpCode::lda, AVR::get_register(o2_reg_num));
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instructions.emplace_back(mos6502::OpCode::sta, AVR::get_register(o1_reg_num));
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return;
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case AVR::OpCode::lsl:
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instructions.emplace_back(mos6502::OpCode::asl, AVR::get_register(o1.reg_num));
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instructions.emplace_back(mos6502::OpCode::asl, AVR::get_register(o1_reg_num));
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return;
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case AVR::OpCode::rol:
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instructions.emplace_back(mos6502::OpCode::rol, AVR::get_register(o1.reg_num));
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instructions.emplace_back(mos6502::OpCode::rol, AVR::get_register(o1_reg_num));
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return;
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case AVR::OpCode::rcall:
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instructions.emplace_back(mos6502::OpCode::jsr, Operand(o1.type, o1.value));
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instructions.emplace_back(mos6502::OpCode::jsr, o1);
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return;
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case AVR::OpCode::ld:
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{
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if (o2.value == "Z" || o2.value == "X" || o2.value == "Y") {
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indirect_load(instructions, AVR::get_register(o2.value[0]).value, AVR::get_register(o1.reg_num).value);
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indirect_load(instructions, AVR::get_register(o2.value[0]).value, AVR::get_register(o1_reg_num).value);
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return;
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}
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if (o2.value == "Z+" || o2.value == "X+" || o2.value == "Y+") {
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indirect_load(instructions, AVR::get_register(o2.value[0]).value, AVR::get_register(o1.reg_num).value);
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indirect_load(instructions, AVR::get_register(o2.value[0]).value, AVR::get_register(o1_reg_num).value);
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increment_16_bit(instructions, AVR::get_register_number(o2.value[0]));
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return;
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}
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throw std::runtime_error("Unhandled ld to non-Z");
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}
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case AVR::OpCode::sbci:
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{
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// we want to utilize the carry flag, however it was set previously
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// (it's really a borrow flag on the 6502)
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instructions.emplace_back(mos6502::OpCode::lda, AVR::get_register(o1_reg_num));
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instructions.emplace_back(mos6502::OpCode::sbc, Operand(o2.type, fixup_8bit_literal(o2.value)));
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instructions.emplace_back(mos6502::OpCode::sta, AVR::get_register(o1_reg_num));
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fixup_16_bit_N_Z_flags(instructions);
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return;
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}
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case AVR::OpCode::subi:
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{
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// to do: deal with Carry bit (and other flags) nonsense from AVR
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// if |x| < |y| -> x-y +carry
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// for these special cases with -(1) and -(-(1))
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if (o2.value == "lo8(-(-1))") {
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instructions.emplace_back(mos6502::OpCode::dec, AVR::get_register(o1.reg_num));
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instructions.emplace_back(mos6502::OpCode::dec, AVR::get_register(o1_reg_num));
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return;
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}
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if (o2.value == "lo8(-(1))") {
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instructions.emplace_back(mos6502::OpCode::inc, AVR::get_register(o1.reg_num));
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instructions.emplace_back(mos6502::OpCode::inc, AVR::get_register(o1_reg_num));
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return;
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}
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throw std::runtime_error("Unhandled subi sub case");
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instructions.emplace_back(mos6502::OpCode::lda, AVR::get_register(o1_reg_num));
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// have to set carry flag, since it gets inverted by sbc
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instructions.emplace_back(mos6502::OpCode::sec);
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instructions.emplace_back(mos6502::OpCode::sbc, Operand(o2.type, fixup_8bit_literal(o2.value)));
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instructions.emplace_back(mos6502::OpCode::sta, AVR::get_register(o1_reg_num));
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// temporarily store lower order (not carried substraction) byte into Y for checking
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// later if this is a two byte subtraction operation
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instructions.emplace_back(mos6502::OpCode::tay);
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return;
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}
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case AVR::OpCode::st: {
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if (o1.value == "Z" || o1.value == "Y"||o1.value == "X") {
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indirect_store(instructions, AVR::get_register(o2.reg_num).value, AVR::get_register(o1.value[0]).value);
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indirect_store(instructions, AVR::get_register(o2_reg_num).value, AVR::get_register(o1.value[0]).value);
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return;
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}
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if (o1.value == "Z+" || o1.value == "Y+" || o1.value == "X+") {
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indirect_store(instructions, AVR::get_register(o2.reg_num).value, AVR::get_register(o1.value[0]).value);
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indirect_store(instructions, AVR::get_register(o2_reg_num).value, AVR::get_register(o1.value[0]).value);
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increment_16_bit(instructions, AVR::get_register_number(o1.value[0]));
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return;
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}
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@ -756,28 +830,28 @@ void translate_instruction(std::vector<mos6502> &instructions, const AVR::OpCode
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}
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case AVR::OpCode::lds: {
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instructions.emplace_back(mos6502::OpCode::lda, o2);
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instructions.emplace_back(mos6502::OpCode::sta, AVR::get_register(o1.reg_num));
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instructions.emplace_back(mos6502::OpCode::sta, AVR::get_register(o1_reg_num));
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return;
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}
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case AVR::OpCode::lsr: {
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instructions.emplace_back(mos6502::OpCode::lsr, AVR::get_register(o1.reg_num));
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instructions.emplace_back(mos6502::OpCode::lsr, AVR::get_register(o1_reg_num));
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return;
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}
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case AVR::OpCode::andi: {
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instructions.emplace_back(mos6502::OpCode::lda, AVR::get_register(o1.reg_num));
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instructions.emplace_back(mos6502::OpCode::lda, AVR::get_register(o1_reg_num));
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instructions.emplace_back(mos6502::OpCode::AND, Operand(o2.type, fixup_8bit_literal(o2.value)));
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instructions.emplace_back(mos6502::OpCode::sta, AVR::get_register(o1.reg_num));
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instructions.emplace_back(mos6502::OpCode::sta, AVR::get_register(o1_reg_num));
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return;
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}
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case AVR::OpCode::eor: {
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instructions.emplace_back(mos6502::OpCode::lda, AVR::get_register(o1.reg_num));
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instructions.emplace_back(mos6502::OpCode::eor, AVR::get_register(o2.reg_num));
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instructions.emplace_back(mos6502::OpCode::sta, AVR::get_register(o1.reg_num));
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instructions.emplace_back(mos6502::OpCode::lda, AVR::get_register(o1_reg_num));
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instructions.emplace_back(mos6502::OpCode::eor, AVR::get_register(o2_reg_num));
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instructions.emplace_back(mos6502::OpCode::sta, AVR::get_register(o1_reg_num));
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return;
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}
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case AVR::OpCode::sbrc: {
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instructions.emplace_back(mos6502::OpCode::lda, Operand(o2.type, fixup_8bit_literal("$" + std::to_string(1 << (atoi(o2.value.c_str()))))));
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instructions.emplace_back(mos6502::OpCode::bit, AVR::get_register(o1.reg_num));
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instructions.emplace_back(mos6502::OpCode::bit, AVR::get_register(o1_reg_num));
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std::string new_label_name = "skip_next_instruction_" + std::to_string(instructions.size());
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instructions.emplace_back(mos6502::OpCode::beq, Operand(Operand::Type::literal, new_label_name));
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instructions.emplace_back(ASMLine::Type::Directive, new_label_name);
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@ -785,7 +859,7 @@ void translate_instruction(std::vector<mos6502> &instructions, const AVR::OpCode
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}
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case AVR::OpCode::sbrs: {
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instructions.emplace_back(mos6502::OpCode::lda, Operand(o2.type, fixup_8bit_literal("$" + std::to_string(1 << (atoi(o2.value.c_str()))))));
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instructions.emplace_back(mos6502::OpCode::bit, AVR::get_register(o1.reg_num));
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instructions.emplace_back(mos6502::OpCode::bit, AVR::get_register(o1_reg_num));
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std::string new_label_name = "skip_next_instruction_" + std::to_string(instructions.size());
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instructions.emplace_back(mos6502::OpCode::bne, Operand(Operand::Type::literal, new_label_name));
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instructions.emplace_back(ASMLine::Type::Directive, new_label_name);
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@ -804,6 +878,11 @@ void translate_instruction(std::vector<mos6502> &instructions, const AVR::OpCode
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instructions.emplace_back(mos6502::OpCode::jmp, o1);
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return;
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}
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case AVR::OpCode::sbiw: {
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subtract_16_bit(instructions, o1_reg_num, atoi(o2.value.c_str()));
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return;
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}
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}
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throw std::runtime_error("Could not translate unhandled instruction");
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@ -1137,6 +1216,27 @@ void to_mos6502(const FromArch &i, std::vector<mos6502> &instructions)
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case ASMLine::Type::Directive:
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if (i.text.starts_with(".string")) {
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instructions.emplace_back(ASMLine::Type::Directive, ".asc " + i.text.substr(7));
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} else if (i.text.starts_with(".zero")) {
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const auto count = atoi(i.text.data() + 6);
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std::string zeros;
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for (int i = 0; i < count; ++i)
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{
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if ((i % 20) == 0) {
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if (!zeros.empty()) {
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instructions.emplace_back(ASMLine::Type::Directive, zeros);
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zeros.clear();
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}
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zeros += ".byt 0";
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} else {
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zeros += ",0";
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}
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}
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if (!zeros.empty()) {
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instructions.emplace_back(ASMLine::Type::Directive, zeros);
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}
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} else {
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instructions.emplace_back(ASMLine::Type::Directive, "; Unknown directive: " + i.text);
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}
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@ -1308,6 +1408,16 @@ bool fix_overwritten_flags(std::vector<mos6502> &instructions)
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return false;
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}
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void setup_target_cpu_state([[maybe_unused]] const std::vector<AVR> &instructions, std::vector<mos6502> &new_instructions) {
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// set __zero_reg__ (reg 1 on AVR) to 0
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new_instructions.emplace_back(mos6502::OpCode::lda, Operand(Operand::Type::literal, "#$00"));
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new_instructions.emplace_back(mos6502::OpCode::sta, AVR::get_register(1));
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}
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void
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setup_target_cpu_state([[maybe_unused]] const std::vector<i386> &instructions, [[maybe_unused]] std::vector<mos6502> &new_instructions) {
|
||||
}
|
||||
|
||||
template<typename Arch>
|
||||
void run(std::istream &input) {
|
||||
|
|
@ -1367,48 +1477,23 @@ void run(std::istream &input) {
|
|||
{
|
||||
if (i.type == ASMLine::Type::Instruction)
|
||||
{
|
||||
// if (labels.count(i.operand1.value) != 0) {
|
||||
used_labels.insert(strip_lo_hi(i.operand1.value));
|
||||
used_labels.insert(strip_lo_hi(i.operand2.value));
|
||||
// }
|
||||
|
||||
const auto check_label = [&](const auto &value){
|
||||
if (labels.count(value) != 0) {
|
||||
used_labels.insert(value);
|
||||
}
|
||||
};
|
||||
|
||||
check_label(i.operand1.value);
|
||||
check_label(i.operand2.value);
|
||||
check_label(strip_lo_hi(i.operand1.value));
|
||||
check_label(strip_lo_hi(i.operand2.value));
|
||||
}
|
||||
}
|
||||
used_labels.erase("X");
|
||||
used_labels.erase("X+");
|
||||
used_labels.erase("-X");
|
||||
used_labels.erase("Y");
|
||||
used_labels.erase("Y+");
|
||||
used_labels.erase("-Y");
|
||||
used_labels.erase("Z");
|
||||
used_labels.erase("Z+");
|
||||
used_labels.erase("-Z");
|
||||
// remove all labels and directives that we don't need
|
||||
instructions.erase(
|
||||
std::remove_if(std::begin(instructions), std::end(instructions),
|
||||
[&used_labels](const auto &i){
|
||||
if (i.type == ASMLine::Type::Label) {
|
||||
// if (used_labels.count(i.text) == 0) {
|
||||
// std::cout << "; removed label: '" << i.text << "'\n";
|
||||
// remove all unused labels that aren't 'main'
|
||||
// return true;
|
||||
// }
|
||||
}
|
||||
if (i.type == ASMLine::Type::Directive) {
|
||||
// return true;
|
||||
}
|
||||
return false;
|
||||
}
|
||||
),
|
||||
std::end(instructions)
|
||||
);
|
||||
|
||||
|
||||
|
||||
const auto new_labels =
|
||||
[&used_labels](){
|
||||
std::map<std::string, std::string> result;
|
||||
// result.emplace(std::make_pair("0", "-memcpy_0"));
|
||||
for (const auto &l : used_labels) {
|
||||
auto newl = l;
|
||||
std::transform(newl.begin(), newl.end(), newl.begin(), [](const auto c) { return std::tolower(c); });
|
||||
|
|
@ -1456,8 +1541,10 @@ void run(std::istream &input) {
|
|||
std::vector<mos6502> new_instructions;
|
||||
new_instructions.emplace_back(ASMLine::Type::Directive, ".word $1000");
|
||||
new_instructions.emplace_back(ASMLine::Type::Directive, "* = $1000");
|
||||
setup_target_cpu_state(instructions, new_instructions);
|
||||
new_instructions.emplace_back(mos6502::OpCode::jmp, Operand(Operand::Type::literal, "main"));
|
||||
|
||||
|
||||
bool skip_next_instruction = false;
|
||||
std::string next_label_name;
|
||||
for (const auto &i : instructions)
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user