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start asm2 conversion
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@ -2,9 +2,19 @@ package com.htmlism.scratchpad
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package object syntax:
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implicit class WriteRegisterOps[Addr](reg: WriteAddress[Addr]):
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def write[A: Loadable](x: A): syntax.PartiallyAppliedWrite[A, Addr] =
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def writeConst[A: Loadable](x: A): syntax.PartiallyAppliedWrite[A, Addr] =
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new syntax.PartiallyAppliedWrite(reg, x)
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def writeFrom[R: Store]: Asm2[R, Addr] =
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val storeInstruction =
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Store[R].to
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val storeStr =
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s"$storeInstruction ${reg.n.toString}"
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// TODO encoding now already makes the structures lose semantic meaning
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Asm2(List(s"$storeInstruction ${reg.n.toString}"))
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class PartiallyAppliedWrite[Addr: Loadable, A](reg: WriteAddress[A], x: Addr):
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def apply[R: Load: Store: Register]: String =
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val literal =
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@ -12,23 +12,23 @@ class ExampleRegister
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class FeatureSpec extends AnyFunSuite with Matchers:
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test("zero page address as write only supports writing") {
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ExampleRegister
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.write(2)[A] shouldBe "LDA 2 STA 1 ; example = 2, via A"
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.writeConst(2)[A] shouldBe "LDA 2 STA 1 ; example = 2, via A"
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}
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test("zero page address as read/write supports writing") {
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ExampleRegister
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.write(2)[A] shouldBe "LDA 2 STA 1 ; example = 2, via A"
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.writeConst(2)[A] shouldBe "LDA 2 STA 1 ; example = 2, via A"
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}
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test("writing to an address can use A, X, and Y registers for bouncing") {
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ExampleRegister
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.write(2)[A] shouldBe "LDA 2 STA 1 ; example = 2, via A"
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.writeConst(2)[A] shouldBe "LDA 2 STA 1 ; example = 2, via A"
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ExampleRegister
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.write(2)[X] shouldBe "LDX 2 STX 1 ; example = 2, via X"
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.writeConst(2)[X] shouldBe "LDX 2 STX 1 ; example = 2, via X"
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ExampleRegister
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.write(2)[Y] shouldBe "LDY 2 STY 1 ; example = 2, via Y"
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.writeConst(2)[Y] shouldBe "LDY 2 STY 1 ; example = 2, via Y"
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}
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ignore("the write payload is a typesafe enum") {}
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