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Finish ACME v0.96.4 support
There's no easy way to make non-zero-bank 65816 code work, so I'm punting and just generating a whole-file hex dump for those. This renders tests 2007 and 2009 useless, so I'm hesitant to claim that ACME support is fully functional.
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@@ -24,9 +24,10 @@ for each.</p>
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<p>SourceGen currently supports the following cross-assemblers:</p>
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<ul>
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<li><a href="https://sourceforge.net/projects/tass64/">64tass</a> v1.53.1515 or later</li>
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<li><a href="https://cc65.github.io/">cc65</a> v2.17 or later</li>
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<li><a href="https://www.brutaldeluxe.fr/products/crossdevtools/merlin/">Merlin 32</a> v1.0.0 or later</li>
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<li><a href="#64tass">64tass</a></li>
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<li><a href="#acme">ACME</a></li>
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<li><a href="#cc65">cc65</a></li>
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<li><a href="#merlin32">Merlin 32</a></li>
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</ul>
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@@ -124,7 +125,8 @@ code, but also needs to know how to handle the corner cases.</p>
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<h3><a name="64tass">64tass</a></h3>
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<p>Code is generated for 64tass v1.53.1515.</p>
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<p>Code is generated for 64tass v1.53.1515 or later.
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<a href="https://sourceforge.net/projects/tass64/">[web site]</a></p>
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<p>Bugs:</p>
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<ul>
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@@ -157,16 +159,52 @@ code, but also needs to know how to handle the corner cases.</p>
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</ul>
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<h3><a name="cc65">cc65</a></h3>
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<h3><a name="acme">ACME</a></h3>
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<p>Code is generated for cc65 v2.27.</p>
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<p>Code is generated for ACME v0.96.4 or later.
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<a href="https://sourceforge.net/projects/acme-crossass/">[web site]</a></p>
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<p>Bugs:</p>
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<ul>
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<li>The arguments to MVN/MVP are reversed.</li>
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<li>The "pseudo PC" is only 16 bits, so any 65816 code targeted to run
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outside bank zero cannot be assembled. SourceGen currently deals with
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this by outputting the entire file as a hex dump.</li>
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<li>Undocumented opcode $AB (<code>LAX #imm</code>) generates an error.</li>
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</ul>
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<p>Quirks:</p>
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<ul>
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<li>The assembler shares some traits with one-pass assemblers. In
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particular, if you forward-reference a zero-page label, the reference
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generates a 16-bit absolute address instead of an 8-bit zero-page
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address. Unlike other one-pass assemblers, the width is "sticky",
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and backward references appearing later in the file also use absolute
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addressing even though the proper width is known at that point. This is
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worked around by using explicit "force zero page" annotations on
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all references to zero-page labels.</li>
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<li>Undocumented opcode <code>ALR</code> ($4b) uses mnemonic
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<code>ASR</code> instead.</li>
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<li>Officially, the preferred file extension for ACME source code is ".a",
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but this is already used on UNIX systems for static libraries (which
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means shell file completion tends to ignore it). Since ".S" is pretty
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universally recognized as assembly source, code generated by SourceGen
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for ACME also uses ".S".</li>
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</ul>
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<h3><a name="cc65">cc65</a></h3>
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<p>Code is generated for cc65 v2.17 or v2.18.
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<a href="https://cc65.github.io/">[web site]</a></p>
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<p>Bugs:</p>
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<ul>
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<li>The arguments to <code>MVN</code>/<code>MVP</code> are reversed (v2.17)
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or zeroed (v2.18).</li>
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<li>PC relative branches don't wrap around at bank boundaries.</li>
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<li>BRK <arg> is assembled to opcode $05 rather than $00.</li>
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<li>WDM is not supported.</li>
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<li>[fixed in v2.18] <code>BRK <arg></code> is assembled to opcode
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$05 rather than $00.</li>
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<li>[fixed in v2.18] <code>WDM</code> is not supported.</li>
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</ul>
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<p>Quirks:</p>
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@@ -182,9 +220,9 @@ code, but also needs to know how to handle the corner cases.</p>
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other opcodes match up with the "unintended opcodes" document.</li>
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<li>ca65 is implemented as a single-pass assembler, so label widths
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can't always be known in time. For example, if you use some zero-page
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labels, but they're defined via .ORG $0000 after the point where the
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labels are used, the assembler will already have generated them as
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absolute values. Width disambiguation must be applied to operands
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labels, but they're defined via <code>.ORG $0000</code> after the point
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where the labels are used, the assembler will already have generated them
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as absolute values. Width disambiguation must be applied to operands
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that wouldn't be ambiguous to a multi-pass assembler.</li>
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<li>The assembler is geared toward generating relocatable code with
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multiple segments (it is, after all, an assembler for a C compiler).
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@@ -195,7 +233,10 @@ code, but also needs to know how to handle the corner cases.</p>
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<h3><a name="merlin32">Merlin 32</a></h3>
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<p>Code is generated for Merlin 32 v1.0.</p>
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<p>Code is generated for Merlin 32 v1.0.
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<a href="https://www.brutaldeluxe.fr/products/crossdevtools/merlin/">[web site]</a>
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<a href="https://github.com/apple2accumulator/merlin32/issues">[bug tracker]</a>
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</p>
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<p>Bugs:</p>
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<ul>
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@@ -227,9 +268,11 @@ code, but also needs to know how to handle the corner cases.</p>
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but doesn't attempt to track the emulation flag. So if you issue a
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<code>REP #$20</code>
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while in emulation mode, the assembler will incorrectly assume long
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registers. (Really I just want to be able to turn the width-tracking
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off, but there's no way to do that.)</li>
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registers. Ideally it would be possible to configure that off, but
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there's no way to do that, so instead we occasionally generate
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additional width directives.</li>
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<li>Non-unique local labels should cause an error, but don't.</li>
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<li>No undocumented opcodes are supported.</li>
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</ul>
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</div>
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