We append an assembler identifier to generated code. For Merlin 32,
this was "_Merlin32". All of the other assemblers use a lower-case
string, which makes Merlin look a little weird, so it has been
changed to "_merlin32".
Windows filesystems are generally case-insensitive, so this won't
likely affect anything.
A few tweaks:
- Test now requires an ORG on offset +000002, not just a correct
address.
- Suppress on-screen display of the initial ORG directive when
a PRG file is detected. Subtle, but helpful.
- In new project setup, fix initial address for PRG projects that
load at $0000.
- In new project setup, add a "load address" comment to the first line.
Also, fix some out-of-date documentation.
(issue #90)
The 10042-data-recognition test has no 65816-specific content, so it
should be named 10040-data-recognition.
Also, remove header comment from 20102-label-dp.
C64 PRG files are pretty common. Their salient feature is that they
start with a 16-bit value that is used as the load address. The
value is commonly generated by the assembler itself, rather than
explicitly added to the source file.
Not all assemblers know what a PRG file is, and some of them handle
it in ways that are difficult to guarantee in SourceGen. ACME adds
the 16-bit header when the output file name ends in ".prg", cc65
uses a modified config file, 64tass uses a different command-line
option, and Merlin 32 has no idea what they are.
This change adds PRG file detection and handling to the 64tass code
generator. Doing so required making a few changes to the gen/asm
interfaces, because we now need to have the generator pass additional
flags to the assembler, and sometimes we need code generation to
start somewhere other than offset zero. Overall the changes were
pretty minor.
The 20042-address-changes test needed a 6502-only variant. A new test
(20040-address-changes) has been added and given a PRG header. As
part of this change the 65816 variant was changed to use addresses
in bank 2, which uncovered a code generation bug that this change
also fixes.
The 64tass --long-address flag doesn't appear to be necessary for
files <= 65536 bytes long, so we no longer emit it for those.
(issue #90)
One of the most confusing things you can do is select a bunch of
lines and apply a code start tag (nee "code hint"). We now ask for
confirmation when applying start/stop hints to multiple lines.
(issue #89)
Variables, types, and comments have been updated to reflect the new
naming scheme.
The project file serialization code is untouched, because the data
is output as serialized enumerated values. Adding a string conversion
layer didn't seem worthwhile.
No changes in behavior.
(issue #89)
Before:
Hint As Code Entry Point
Hint As Data Start
Hint As Inline Data
Remove Hints
After:
Tag Address As Code Start Point
Tag Address As Code Stop Point
Tag Bytes As Inline Data
Remove Analyzer Tags
The goal is to reduce confusion. The old nomenclature was causing
problems because it's inaccurate -- they're directives, not hints --
and made it look like you need to mark data items explicitly. The
new action names emphasize the idea that you should be tagging a
single address for start/stop, not blanketing a region.
This change updates the user interface, manual, and tutorials, but
does not change how the items are referred to in code, and does not
change how the program works.
(issue #89)
Modified the asm source generators and on-screen display to show the
DP arg for BBR/BBS as hex. The instructions are otherwise treated
as relative branches, e.g. the DP arg doesn't get factored into the
cross-reference table.
ACME/cc65 put the bit number in the mnemonic, 64tass wants it to be
in the first argument, and Merlin32 wants nothing to do with any of
this because it's incompatible with the 65816.
Added an "all ops" test for W65C02.
Created the "all ops" tests for W65C02. Filled in enough of the
necessary infrastructure to be able to create the project and
disassemble the file, though we're not yet handling the instructions
correctly.
We were claiming W65C02S, but it turns out that CPU has the Rockwell
extensions and the STP/WAI instructions. We need to change existing
references to be "WDC 65C02", and add a new CPU definition for the
actual W65C02S chip.
This adds the new CPU definition, the instruction definitions for
the Rockwell extensions, and updates the selectors in project properties
and the instruction chart tool.
This change shouldn't affect any existing projects. Still more to do
before W65C02 works though, mostly because the Rockwell instructions
introduced a new two-argument address mode that has to be handled in
various places.
Sometimes you just want to turn cycle counts on for a bit, and going
through app settings is tiresome. Now there's a toolbar checkbox
for it. The icon isn't ideal, but it'll do.
Renaming a user label doesn't cause a re-analysis, just a display
update, because nothing structural is changing. However, that's not
quite true when you have a reference to a non-existent label (e.g.
"LDA hoser"), and you rename a label to match (e.g. change "blah"
to "hoser"). The most obvious consequence was that the Message list,
which enumerates the broken symbolic references, was not being
updated.
We now identify broken references during the refactoring rename, and
change the reanalysis mode accordingly.
There is a deeper problem, where undoing the label rename does the
wrong thing with the previously-broken symbolic references (in the
earlier example, it "undoes" them to "blah" rather than back to
"hoser"). I added some notes about that, but it's harder to fix.
Also, clean up some code that was still treating ReanalysisScope as
if it were bit flags.
Consider:
LDA $00 loads a value from address $00
LDA $00,X might load from $00, or might not
LDA ($00),Y dereferences $00 as a 16-bit pointer
LDA ($00,X) dereferences a pointer, not necessarily from $00
When perusing the cross-reference list, it's useful to be able to
tell whether an instruction is accessing the location, using it as a
base address, or deferencing it as a pointer. We now show "ptr" in
the list for pointer dereferences. (We already showed "idx" for
indexed accesses.)
When editing local variables, the data grid generally has the input
focus, so hitting Enter doesn't close the dialog. Rather than play
games with the focus, just take Ctrl+Enter as a shortcut to close
the dialog (same as notes and long comments).
(I found myself hitting Ctrl+Enter automatically, and being annoyed
when it didn't work, so I figured I'd make it official.)
The "show cycle counts in comments" setting is the only one that
affects both the on-screen display and generated source code. This
felt a little weird, so it's now two independent settings. This
also provided an opportunity to move it to the initial tab, so it's
easier to toggle on and off. Overall it feels less confusing to have
two settings for essentially the same thing, because code generation
is distinct from everything else.
The "spaces between bytes" setting was moved to the Display Format
tab, which seems a better fit.
Documentation and tutorial have been updated.
Also did a little bit of cleanup in EditAppSettings.
- Added SOS parameter block formatting.
- Normalized SOS call names to values in SOS Reference Manual.
- Added SOS call error code constants.
- (from robjustice) Added more to A3-IO.sym65.
Also, rearranged the ProDOS code slightly.
(issue #85)
Inline BRK instructions have a problem similar to the one fixed
for JSR/JSL back in 63d7a487, but the same fix won't work because
JSR/JSL are assumed "continue", while BRK is assumed "no-continue",
and must therefore set a no-no-continue flag. For now, we just
re-evaluate the BRK on every visit to the code.
A review of the previous fix revealed an opportunity to use the
NoContinueScript flag on subsequent visits to improve consistency.
We weren't altering the status flags after a BRK because of the
assumption that a BRK was a crash. For an inline BRK, such as a SOS
call, execution continues. We need to mark NVZC indeterminate or
we may incorrectly handle conditional branches that follow.
The BRK instruction now uses the same flag updater as JSR, since it's
effectively a subroutine call to unknown code. If execution doesn't
continue across the BRK then the flags don't matter.
Updated 20182-extension-scripts to exercise this.
Added explicit widths to the 6502 vectors.
Two changes to Apple II hi-res visualization:
(1) Allow the row stride to be any value >= 1. This is useful
when data is stored in column-major order, i.e. it's a two-byte-wide
shape, with all of the data for the first column stored before the
data for the second column. (Set the row stride to 1, and the
column stride to the bitmap height.)
(2) Modify the layout of grids (sprite sheets and fonts), so that
we're closer to square when the item counts is low. Otherwise the
thumbnail just looks like a dashed line. (This one is strictly
cosmetic.)
Added a bunch of Applesoft entry points, and updated the F8ROM
definitions.
Added a visualizer for Applesoft shape table shapes that are not part
of an actual shape table.
It's fairly common to want to Find something and then jump back to
where you were. The Find command now adds the current position to
the nav stack for the initial search. If you Find Next, the nav
stack is not altered.
This experimental feature applied platform symbols to the project,
setting labels where the platform symbol's address matched an internal
address. The feature now applies project symbols as well, and has
been renamed to "apply external symbols".
We now report the number of labels set.
First, make the per-segment comments and notes optional.
Second, add an "offset segment by $0100" feature that tries to shift
each segment forward 256 bytes. Doing so avoids potential ambiguity
with direct page locations.
The 20212-reloc-data test no longer has the per-segment comments.
The "smart" PLP handler tries to recover the flags from an earlier
PHP. The non-smart version just marks all the flags as indeterminate.
This doesn't work well on the 65816 in native mode, because having
the M/X flags in an indeterminate state is rarely what you want.
Code rarely uses PLP to reset the flags to a specific state, preferring
explicit SEP/REP. The analyzer is more likely to get the correct
answer by simply leaving the flags in their prior state.
A test case has been added to 20052-branches-and-banks, which now has
"smart PLP" disabled.
