2018-02-18 05:12:09 +00:00
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2018-06-11 17:01:09 +00:00
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var EXAMPLE_SPEC = {
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name:'femto8',
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vars:{
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reg:{bits:2, toks:['a', 'b', 'ip', 'none']},
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unop:{bits:3, toks:['mova','movb','inc','dec','asl','lsr','rol','ror']},
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binop:{bits:3, toks:['or','and','xor','zero','add','sub','adc','sbb']},
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imm4:{bits:4},
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imm8:{bits:8},
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rel:{bits:8, iprel:true, ipofs:1},
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},
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rules:[
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{fmt:'~binop ~reg,b', bits:['00',1,'1',0]},
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{fmt:'~binop ~reg,#~imm8', bits:['01',1,'1',0,2]},
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{fmt:'~binop ~reg,[b]', bits:['11',1,'1',0]},
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{fmt:'~unop ~reg', bits:['00',1,'0',0]},
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{fmt:'mov ~reg,[b]', bits:['11',0,'0001']},
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{fmt:'zero ~reg', bits:['00',0,'1011']},
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{fmt:'lda #~imm8', bits:['01','00','0001',0]},
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{fmt:'ldb #~imm8', bits:['01','01','0001',0]},
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{fmt:'jmp ~imm8', bits:['01','10','0001',0]},
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{fmt:'sta ~imm4', bits:['1001',0]},
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{fmt:'bcc ~imm8', bits:['1010','0001',0]},
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{fmt:'bcs ~imm8', bits:['1010','0011',0]},
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{fmt:'bz ~imm8', bits:['1010','1100',0]},
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{fmt:'bnz ~imm8', bits:['1010','0100',0]},
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{fmt:'clc', bits:['10001000']},
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{fmt:'swapab', bits:['10000001']},
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{fmt:'reset', bits:['10001111']},
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]
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}
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2018-02-18 05:12:09 +00:00
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var vm = require('vm');
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var fs = require('fs');
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var assert = require('assert');
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var includeInThisContext = function(path) {
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var code = fs.readFileSync(path);
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vm.runInThisContext(code, path);
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};
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2018-07-11 04:04:28 +00:00
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includeInThisContext("gen/worker/assembler.js");
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2018-02-18 05:12:09 +00:00
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describe('Assemble', function() {
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it('Should assemble', function() {
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var source = `.arch femto8
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.org 128
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.len 128
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.define VPU_LO 8
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.define VPU_HI 9
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.define VPU_WRITE 10
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.define VPU_MOVE 11
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.define IN_FLAGS $42
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.define F_VSYNC 16
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Start:
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2018-02-19 00:19:20 +00:00
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zero A ; comment
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2018-02-18 05:12:09 +00:00
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sta VPU_LO
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sta VPU_HI
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sta 0
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2018-06-11 17:01:09 +00:00
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2018-02-19 00:19:20 +00:00
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DisplayLoop:zero B
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2018-02-18 05:12:09 +00:00
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mov A,[b]
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sta VPU_WRITE
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sta VPU_MOVE
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lda #F_VSYNC
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ldb #IN_FLAGS
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and none,[B]
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bz DisplayLoop
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WaitVsync:
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and none,[B]
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bnz WaitVsync
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zero B
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mov A,[b]
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inc A
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sta 0
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jmp DisplayLoop
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`;
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var asm = new Assembler(EXAMPLE_SPEC);
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var result = asm.assembleFile(source);
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//console.log(result);
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//assert.equal(result, {});
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assert.equal(128, result.origin);
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assert.equal(152, result.ip);
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2018-06-11 17:01:09 +00:00
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console.log(result);
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2018-02-18 05:12:09 +00:00
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assert.deepEqual({
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insns: "0B",
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line: 13,
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nbits: 8,
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offset: 128
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2018-06-11 17:01:09 +00:00
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}, result.lines[0]);
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2018-02-18 05:12:09 +00:00
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assert.deepEqual(
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[ { line: 13, offset: 128, nbits: 8, insns: '0B' },
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{ line: 14, offset: 129, nbits: 8, insns: '98' },
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{ line: 15, offset: 130, nbits: 8, insns: '99' },
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{ line: 16, offset: 131, nbits: 8, insns: '90' },
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{ line: 18, offset: 132, nbits: 8, insns: '1B' },
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{ line: 19, offset: 133, nbits: 8, insns: 'C1' },
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{ line: 20, offset: 134, nbits: 8, insns: '9A' },
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{ line: 21, offset: 135, nbits: 8, insns: '9B' },
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{ line: 22, offset: 136, nbits: 16, insns: '41 10' },
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{ line: 23, offset: 138, nbits: 16, insns: '51 42' },
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{ line: 24, offset: 140, nbits: 8, insns: 'F9' },
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{ line: 25, offset: 141, nbits: 16, insns: 'AC 84' },
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{ line: 27, offset: 143, nbits: 8, insns: 'F9' },
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{ line: 28, offset: 144, nbits: 16, insns: 'A4 8F' },
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{ line: 29, offset: 146, nbits: 8, insns: '1B' },
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{ line: 30, offset: 147, nbits: 8, insns: 'C1' },
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{ line: 31, offset: 148, nbits: 8, insns: '02' },
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{ line: 32, offset: 149, nbits: 8, insns: '90' },
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{ line: 33, offset: 150, nbits: 16, insns: '61 84' },
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2018-06-11 17:01:09 +00:00
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], result.lines);
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2018-02-18 05:12:09 +00:00
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assert.equal(11, result.output[0]);
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assert.equal(128, result.output.length);
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});
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});
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