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fixed tests, printFlags, debug info

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This commit is contained in:
Steven Hugg
2018-08-29 13:43:46 -04:00
parent 05f5b96256
commit bf584674ab
6 changed files with 36 additions and 20 deletions
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test/cli/testworker.js
+3 -3
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@@ -175,7 +175,7 @@ describe('Worker', function() {
assert.ok(fn);
done(err, msg);
};
doBuild(msgs, done2, 2799, 0, 0);
doBuild(msgs, done2, 2781, 0, 0);
});
it('should NOT compile verilog example', function(done) {
var csource = "foobar";
@@ -197,7 +197,7 @@ describe('Worker', function() {
assert.ok(fn);
done(err, msg);
};
doBuild(msgs, done2, 49357, 0, 0);
doBuild(msgs, done2, 49339, 0, 0);
});
it('should compile verilog assembler file (JSASM)', function(done) {
var csource = ab2str(fs.readFileSync('presets/verilog/test2.asm'));
@@ -214,7 +214,7 @@ describe('Worker', function() {
assert.ok(fn);
done(err, msg);
};
doBuild(msgs, done2, 1997627, 0, 0);
doBuild(msgs, done2, 1997609, 0, 0);
});
it('should NOT preprocess SDCC', function(done) {
compile('sdcc', 'int x=0\n#bah\n', 'mw8080bw', done, 0, 0, 1);