Steven Hugg
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ff4bbaccdb
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verilog: added signed property to data types
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2021-07-15 11:41:41 -05:00 |
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Steven Hugg
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876d66e6de
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verilog: fixed video sync for vga mode; ignore line # changes
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2021-07-09 12:56:26 -05:00 |
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Steven Hugg
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85932132d1
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verilog: fixed $time for tests (timescale == msec)
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2021-07-08 16:47:27 -05:00 |
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Steven Hugg
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b9a0de6cac
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verilog: test updates, source locations, labels, Silice
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2021-07-07 15:43:35 -05:00 |
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Steven Hugg
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bc13614b6a
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verilog: $readmem, fixed while loop
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2021-07-05 18:55:06 -05:00 |
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Steven Hugg
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3ec69792b0
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verilog: working on 64-bit, debug tree, fix 1-bit sound
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2021-07-05 11:56:57 -05:00 |
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Steven Hugg
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854a6a2cdc
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verilog: fixed wasm array views, compare test, loadROM async?
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2021-07-03 11:29:11 -05:00 |
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Steven Hugg
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c0d60edbad
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verilog: refactor, trace buffer, fast video update
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2021-07-03 09:03:12 -05:00 |
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Steven Hugg
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4e97cd2eef
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verilog: wasm, HDLModuleRunner interface
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2021-07-01 18:55:28 -05:00 |
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Steven Hugg
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9bb79c318f
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(WIP) new hdl package, verilator 4 (emscripten 2.0.6), hdlwasm
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2021-06-30 18:07:55 -05:00 |
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