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1,541 Commits 3 Branches 31 Tags 162 MiB
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3 Commits

Author SHA1 Message Date
Steven Hugg
10d04f9114 verilog: randomizeOnReset = true except for unit tests (only <=32 bit values reset) 2021-07-09 15:21:41 -05:00
Steven Hugg
2b09a1a9f4 verilog: fixed RAM Text Display example incrementing by +2 2019-08-01 23:10:55 -04:00
Steven Hugg
706a24c96a updated presets, changed array syntax, ice40 fpga examples 2018-10-08 20:38:39 -04:00