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web-based IDE for 8-bit programming and Verilog development
493 Commits 3 Branches 31 Tags 162 MiB
JavaScript 52.5%
TypeScript 16.9%
C 16.1%
Verilog 5.8%
Assembly 5%
Other 3.6%
a2d0f41587
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Steven Hugg a2d0f41587 verilog preset update
2018-12-13 18:25:54 -05:00
bootstrap
cc65
codemirror@4334727f0e
css minor updates 2018-12-06 10:13:17 -05:00
doc verilog preset update 2018-12-13 18:25:54 -05:00
emsrc
FileSaver.js@aa9f4e0e03
gif.js@082076d81c
help/bataribasic
images
javatari.js@bd17384fd2
jquery
jsnes
lib
localForage@7428cfc4a6
mame
octokat.js@2cba2d9172
presets verilog preset update 2018-12-13 18:25:54 -05:00
romsrc/coleco
scripts added cache-control headers to python web server 2018-11-30 08:12:25 -05:00
src fixed keyboard flags 2018-12-09 10:15:02 -05:00
test fixed keyboard flags 2018-12-09 10:15:02 -05:00
tools
tss@d630ddcb29 verilog preset update 2018-12-13 18:25:54 -05:00
_config.yml
.gitignore testplatforms writes PNG files to test/output; fixed astrocade minimal bios 2018-12-01 15:12:05 -05:00
.gitmodules
.htaccess
.travis.yml
demo.html
embed.html
favicon.ico
index.html rename/delete files 2018-12-07 19:34:23 -05:00
javatari
LICENSE
LICENSE.txt sms: better CPU cycle counting 2018-12-01 14:14:09 -05:00
Makefile added cache-control headers to python web server 2018-11-30 08:12:25 -05:00
package-lock.json refactored into BasicZ80ScanlinePlatform 2018-12-02 17:42:17 -05:00
package.json testplatforms writes PNG files to test/output; fixed astrocade minimal bios 2018-12-01 15:12:05 -05:00
pixels.html
privacy.html
README.md
redir.html
testemu.html
testwave.html
tsconfig.json
verilog.html

README.md

8bitworkshop

8bitworkshop.com

git submodule init
git submodule update
npm i
npm run build