mirror of
https://github.com/sehugg/8bitworkshop.git
synced 2024-11-21 23:30:58 +00:00
265 lines
5.5 KiB
Verilog
265 lines
5.5 KiB
Verilog
`include "hvsync_generator.v"
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`include "sprite_bitmap.v"
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`include "sprite_renderer.v"
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`include "cpu8.v"
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// uncomment to see scope view
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//`define DEBUG
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module racing_game_cpu_top(clk, reset, hsync, vsync, hpaddle, vpaddle,
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address_bus, to_cpu, from_cpu, write_enable
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`ifdef DEBUG
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, output [7:0] A
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, output [7:0] B
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, output [7:0] IP
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, output carry
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, output zero
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`else
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, rgb
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`endif
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);
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input clk, reset;
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input hpaddle, vpaddle;
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output hsync, vsync;
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wire display_on;
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wire [8:0] hpos;
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wire [8:0] vpos;
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`ifdef DEBUG
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wire [2:0] rgb;
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assign IP = cpu.IP;
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assign A = cpu.A;
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assign B = cpu.B;
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assign carry = cpu.carry;
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assign zero = cpu.zero;
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`else
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output [3:0] rgb;
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`endif
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parameter PADDLE_X = 0;
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parameter PADDLE_Y = 1;
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parameter PLAYER_X = 2;
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parameter PLAYER_Y = 3;
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parameter ENEMY_X = 4;
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parameter ENEMY_Y = 5;
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parameter ENEMY_DIR = 6;
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parameter SPEED = 7;
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parameter TRACKPOS_LO = 8;
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parameter TRACKPOS_HI = 9;
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parameter IN_HPOS = 8'b01000000;
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parameter IN_VPOS = 8'b01000001;
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parameter IN_FLAGS = 8'b01000010;
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reg [7:0] ram[0:63];
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reg [7:0] rom[0:127];
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output wire [7:0] address_bus;
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output reg [7:0] to_cpu;
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output wire [7:0] from_cpu;
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output wire write_enable;
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CPU cpu(.clk(clk),
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.reset(reset),
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.address(address_bus),
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.data_in(to_cpu),
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.data_out(from_cpu),
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.write(write_enable));
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always @(posedge clk)
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if (write_enable)
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ram[address_bus[5:0]] <= from_cpu;
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always @(*)
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casez (address_bus)
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// RAM
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8'b00??????: to_cpu = ram[address_bus[5:0]];
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// special read registers
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IN_HPOS: to_cpu = hpos[7:0];
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IN_VPOS: to_cpu = vpos[7:0];
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IN_FLAGS: to_cpu = {2'b0, frame_collision,
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vsync, hsync, vpaddle, hpaddle, display_on};
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// ROM
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8'b1???????: to_cpu = rom[address_bus[6:0]];
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default: ;
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endcase
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hvsync_generator hvsync_gen(
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.clk(clk),
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.reset(0),
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.hsync(hsync),
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.vsync(vsync),
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.display_on(display_on),
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.hpos(hpos),
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.vpos(vpos)
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);
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wire player_vstart = {1'0,ram[PLAYER_Y]} == vpos;
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wire player_hstart = {1'0,ram[PLAYER_X]} == hpos;
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wire player_gfx;
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wire player_is_drawing;
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wire enemy_vstart = {1'0,ram[ENEMY_Y]} == vpos;
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wire enemy_hstart = {1'0,ram[ENEMY_X]} == hpos;
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wire enemy_gfx;
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wire enemy_is_drawing;
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wire [3:0] car_sprite_yofs;
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wire [7:0] car_sprite_bits;
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car_bitmap car(
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.yofs(car_sprite_yofs),
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.bits(car_sprite_bits));
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sprite_renderer player_renderer(
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.clk(clk),
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.vstart(player_vstart),
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.hstart(player_hstart),
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.load(hpos == 256), //TODO?
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.rom_addr(car_sprite_yofs),
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.rom_bits(car_sprite_bits),
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.gfx(player_gfx),
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.in_progress(player_is_drawing));
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sprite_renderer enemy_renderer(
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.clk(clk),
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.vstart(enemy_vstart),
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.hstart(enemy_hstart),
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.load(hpos == 260), //TODO?
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.rom_addr(car_sprite_yofs),
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.rom_bits(car_sprite_bits),
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.gfx(enemy_gfx),
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.in_progress(player_is_drawing));
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reg frame_collision;
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always @(posedge clk)
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if (player_gfx && (enemy_gfx || track_gfx))
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frame_collision <= 1;
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else if (vpos==0)
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frame_collision <= 0;
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wire track_offside = (hpos[7:5]==0) || (hpos[7:5]==7);
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wire track_shoulder = (hpos[7:3]==3) || (hpos[7:3]==28);
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wire track_gfx = (vpos[5:1]!=ram[TRACKPOS_LO][5:1]) && track_offside;
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wire r = display_on && (player_gfx || enemy_gfx || track_shoulder);
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wire g = display_on && (player_gfx || track_gfx);
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wire b = display_on && (enemy_gfx || track_shoulder);
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assign rgb = {1'b0,b,g,r};
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`ifdef EXT_INLINE_ASM
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initial begin
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rom = '{
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__asm
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.arch femto8
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.org 128
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.len 128
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.define PADDLE_X 0
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.define PADDLE_Y 1
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.define PLAYER_X 2
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.define PLAYER_Y 3
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.define ENEMY_X 4
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.define ENEMY_Y 5
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.define ENEMY_DIR 6
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.define SPEED 7
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.define TRACKPOS_LO 8
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.define TRACKPOS_HI 9
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.define IN_HPOS $40
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.define IN_VPOS $41
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.define IN_FLAGS $42
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.define F_DISPLAY 1
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.define F_HPADDLE 2
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.define F_VPADDLE 4
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.define F_HSYNC 8
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.define F_VSYNC 16
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.define F_COLLIDE 32
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Start:
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lda #128
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sta PLAYER_X
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sta ENEMY_X
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sta ENEMY_Y
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lda #180
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sta PLAYER_Y
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zero A
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sta SPEED
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inc A
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sta ENEMY_DIR
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; test hpaddle flag
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DisplayLoop:
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lda #F_HPADDLE
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ldb #IN_FLAGS
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and none,[B]
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bz DisplayLoop
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; [vpos] -> paddle_x
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ldb #IN_VPOS
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mov A,[B]
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sta PLAYER_X
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; wait for vsync=1 then vsync=0
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lda #F_VSYNC
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ldb #IN_FLAGS
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WaitForVsyncOn:
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and none,[B]
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bz WaitForVsyncOn
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WaitForVsyncOff:
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and none,[B]
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bnz WaitForVsyncOff
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; check collision
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lda #F_COLLIDE
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ldb #IN_FLAGS
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and none,[B]
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bz NoCollision
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; load slow speed
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lda #16
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sta SPEED
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NoCollision:
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; update speed
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ldb #SPEED
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mov A,[B]
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inc A
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; don't store if == 0
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bz MaxSpeed
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sta SPEED
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MaxSpeed:
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mov A,[B]
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lsr A
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lsr A
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lsr A
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lsr A
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; add to lo byte of track pos
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ldb #TRACKPOS_LO
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add B,[B]
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swapab
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sta TRACKPOS_LO
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swapab
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; update enemy vert pos
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ldb #ENEMY_Y
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add A,[B]
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sta ENEMY_Y
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; update enemy horiz pos
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ldb #ENEMY_X
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mov A,[B]
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ldb #ENEMY_DIR
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add A,[B]
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sta ENEMY_X
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sub A,#64
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and A,#127
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bnz SkipXReverse
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; load ENEMY_DIR and negate
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zero A
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sub A,[B]
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sta ENEMY_DIR
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; back to display loop
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SkipXReverse:
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jmp DisplayLoop
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__endasm
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};
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end
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`endif
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endmodule
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