mirror of
https://github.com/hoglet67/AtomBusMon.git
synced 2025-04-01 11:30:49 +00:00
Shrunk the 6809 disassembler; version now 0.50
Change-Id: I2776857e2b080ac90d45e79a20ad530f16abfd46
This commit is contained in:
David Banks
parent
20269623ea
commit
1e76d0d980
firmware
@ -10,7 +10,7 @@
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* VERSION and NAME are used in the start-up message
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********************************************************/
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#define VERSION "0.49"
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#define VERSION "0.50"
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#if (CPU == Z80)
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#define NAME "ICE-T80"
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@ -29,8 +29,10 @@
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#ifdef CPUEMBEDDED
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#if (CPU == Z80)
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#define NUM_CMDS 28
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#else
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#elif (CPU == 6502)
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#define NUM_CMDS 22
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#else
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#define NUM_CMDS 21
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#endif
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#else
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#define NUM_CMDS 14
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@ -55,7 +57,8 @@ char *cmdStrings[NUM_CMDS] = {
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"io",
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"rdi",
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"wri",
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#else
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#endif
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#if (CPU == 6502)
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"test",
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#endif
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#endif
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@ -95,7 +98,8 @@ void (*cmdFuncs[NUM_CMDS])(char *params) = {
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doCmdIO,
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doCmdReadIO,
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doCmdWriteIO,
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#else
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#endif
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#if (CPU == 6502)
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doCmdTest,
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#endif
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#endif
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@ -473,24 +477,19 @@ unsigned int hwRead16(unsigned int offset) {
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}
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// Shift a breakpoint definition into the breakpoint shift register
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void shift(unsigned int value, int numbits) {
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while (numbits-- > 0) {
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hwCmd(CMD_LOAD_BRKPT, value & 1);
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value >>= 1;
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}
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}
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void shiftBreakpointRegister(unsigned int addr, unsigned int mask, unsigned int mode, int trigger) {
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int i;
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for (i = 0; i <= 15; i++) {
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hwCmd(CMD_LOAD_BRKPT, addr & 1);
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addr >>= 1;
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}
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for (i = 0; i <= 15; i++) {
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hwCmd(CMD_LOAD_BRKPT, mask & 1);
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mask >>= 1;
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}
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for (i = 0; i <= 9; i++) {
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hwCmd(CMD_LOAD_BRKPT, mode & 1);
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mode >>= 1;
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}
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for (i = 0; i <= 3; i++) {
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hwCmd(CMD_LOAD_BRKPT, trigger & 1);
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trigger >>= 1;
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}
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shift(addr, 16);
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shift(mask, 16);
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shift(mode, 10);
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shift(trigger, 4);
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}
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#ifdef LCD
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@ -832,7 +831,7 @@ void genericBreakpoint(char *params, unsigned int mode) {
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********************************************************/
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#ifdef CPUEMBEDDED
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#if (CPU != Z80)
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#if (CPU == 6502)
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char *testNames[6] = {
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"Fixed",
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"Checkerboard",
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@ -1029,7 +1028,9 @@ void doCmdWriteIO(char *params) {
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genericWrite(params, writeIOByte);
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}
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#else
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#endif
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#if (CPU == 6502)
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void doCmdTest(char *params) {
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unsigned int start;
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@ -15,61 +15,8 @@
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
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#include "AtomBusMon.h"
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static const int size[] = {
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2,1,1,2,2,1,2,2,2,2,2,1,2,2,2,2,
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1,1,1,1,1,1,3,3,1,1,2,1,2,1,2,2,
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2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,1,1,1,1,2,1,1,1,
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1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
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1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
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2,1,1,2,2,1,2,2,2,2,2,1,2,2,2,2,
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3,1,1,3,3,1,3,3,3,3,3,1,3,3,3,3,
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2,2,2,3,2,2,2,1,2,2,2,2,3,2,3,1,
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2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,
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3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,
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2,2,2,3,2,2,2,1,2,2,2,2,3,1,3,1,
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2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,
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3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,
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1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
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1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
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1,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
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1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,2,
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1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
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1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
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1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
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1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
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1,1,1,4,1,1,1,1,1,1,1,1,4,1,4,1,
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1,1,1,3,1,1,1,1,1,1,1,1,3,1,3,3,
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1,1,1,3,1,1,1,1,1,1,1,1,3,1,3,3,
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1,1,1,4,1,1,1,1,1,1,1,1,4,1,4,4,
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1,1,1,1,1,1,1,1,1,1,1,1,1,1,4,1,
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1,1,1,1,1,1,1,1,1,1,1,1,1,1,3,3,
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1,1,1,1,1,1,1,1,1,1,1,1,1,1,3,3,
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1,1,1,1,1,1,1,1,1,1,1,1,1,1,4,4,
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1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
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1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
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1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
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1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,2,
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1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
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1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
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1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
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1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
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1,1,1,4,1,1,1,1,1,1,1,1,4,1,1,1,
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1,1,1,3,1,1,1,1,1,1,1,1,3,1,1,1,
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1,1,1,3,1,1,1,1,1,1,1,1,3,1,1,1,
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1,1,1,4,1,1,1,1,1,1,1,1,4,1,1,1,
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1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
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1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
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1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
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1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1 };
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unsigned char get_memb(unsigned int addr) {
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loadAddr(addr);
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return readMemByteInc();
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@ -90,118 +37,602 @@ unsigned int get_memw(unsigned int addr) {
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return readMemByteInc() + (readMemByteInc() << 8);
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}
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/*
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modes:
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1 immediate
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2 direct
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3 indexed
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4 extended
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5 inherent
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6 relative
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*/
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static const int mode[] = {
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2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,
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0,0,5,5,0,0,6,6,0,5,5,0,5,5,5,5,
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6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,
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3,3,3,3,5,5,5,5,5,5,5,5,5,5,5,5,
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5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,
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5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,
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3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,
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4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
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1,1,1,1,1,1,1,1,1,1,1,1,1,6,1,0,
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2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,
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3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,
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4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
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1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,
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2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,
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3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,
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4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
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0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
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0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
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0,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,
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0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,5,
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0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
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0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
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0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
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0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
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0,0,0,1,0,0,0,0,0,0,0,0,1,0,1,0,
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0,0,0,2,0,0,0,0,0,0,0,0,2,0,2,2,
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0,0,0,3,0,0,0,0,0,0,0,0,3,0,3,3,
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0,0,0,4,0,0,0,0,0,0,0,0,4,0,4,4,
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0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,
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0,0,0,0,0,0,0,0,0,0,0,0,0,0,2,2,
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0,0,0,0,0,0,0,0,0,0,0,0,0,0,3,3,
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0,0,0,0,0,0,0,0,0,0,0,0,0,0,4,4,
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0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
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0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
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0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
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0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,5,
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0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
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0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
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0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
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0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
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0,0,0,1,0,0,0,0,0,0,0,0,1,0,0,0,
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0,0,0,2,0,0,0,0,0,0,0,0,2,0,0,0,
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0,0,0,3,0,0,0,0,0,0,0,0,3,0,0,0,
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0,0,0,4,0,0,0,0,0,0,0,0,4,0,0,0,
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0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
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0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
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0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
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0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 };
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enum opcodes {
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OP_UU ,
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OP_XX ,
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OP_ABX ,
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OP_ADCA,
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OP_ADCB,
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OP_ADDA,
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OP_ADDB,
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OP_ADDD,
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OP_ANDA,
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OP_ANDB,
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OP_ANDC,
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OP_ASL ,
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OP_ASLA,
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OP_ASR ,
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OP_ASRA,
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OP_ASRB,
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OP_BCC ,
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OP_BEQ ,
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OP_BGE ,
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OP_BGT ,
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OP_BHI ,
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OP_BITA,
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OP_BITB,
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OP_BLE ,
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OP_BLO ,
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OP_BLS ,
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OP_BLT ,
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OP_BMI ,
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OP_BNE ,
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OP_BPL ,
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OP_BRA ,
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OP_BRN ,
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OP_BSR ,
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OP_BVC ,
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OP_BVS ,
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OP_CLR ,
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OP_CLRA,
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OP_CLRB,
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OP_CMPA,
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OP_CMPB,
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OP_CMPD,
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OP_CMPS,
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OP_CMPU,
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OP_CMPX,
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OP_CMPY,
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OP_COM ,
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OP_COMA,
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OP_COMB,
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OP_CWAI,
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OP_DAA ,
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OP_DEC ,
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OP_DECA,
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OP_DECB,
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OP_EORA,
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OP_EORB,
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OP_EXG ,
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OP_INC ,
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OP_INCA,
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OP_INCB,
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OP_JMP ,
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OP_JSR ,
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OP_LBCC,
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OP_LBEQ,
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OP_LBGE,
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OP_LBGT,
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OP_LBHI,
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OP_LBLE,
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OP_LBLO,
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OP_LBLS,
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OP_LBLT,
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OP_LBMI,
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OP_LBNE,
|
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OP_LBPL,
|
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OP_LBRA,
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OP_LBRN,
|
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OP_LBSR,
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OP_LBVC,
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OP_LBVS,
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OP_LDA ,
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OP_LDB ,
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OP_LDD ,
|
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OP_LDS ,
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OP_LDU ,
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OP_LDX ,
|
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OP_LDY ,
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OP_LEAS,
|
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OP_LEAU,
|
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OP_LEAX,
|
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OP_LEAY,
|
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OP_LSLB,
|
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OP_LSR ,
|
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OP_LSRA,
|
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OP_LSRB,
|
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OP_MUL ,
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OP_NEG ,
|
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OP_NEGA,
|
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OP_NEGB,
|
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OP_NOP ,
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OP_ORA ,
|
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OP_ORB ,
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OP_ORCC,
|
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OP_PSHS,
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OP_PSHU,
|
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OP_PULS,
|
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OP_PULU,
|
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OP_ROL ,
|
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OP_ROLA,
|
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OP_ROLB,
|
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OP_ROR ,
|
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OP_RORA,
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OP_RORB,
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OP_RTI ,
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OP_RTS ,
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OP_SBCA,
|
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OP_SBCB,
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OP_SEX ,
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OP_STA ,
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OP_STB ,
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OP_STD ,
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OP_STS ,
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OP_STU ,
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OP_STX ,
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OP_STY ,
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OP_SUBA,
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OP_SUBB,
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OP_SUBD,
|
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OP_SWI ,
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OP_SWI2,
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OP_SWI3,
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OP_SYNC,
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OP_TFR ,
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OP_TST ,
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OP_TSTA,
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OP_TSTB
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};
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static const char inst[] = "\
|
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NEG ?? ?? COM LSR ?? ROR ASR ASL ROL DEC ?? INC TST JMP CLR \
|
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-- -- NOP SYNC?? ?? LBRALBSR?? DAA ORCC?? ANDCSEX EXG TFR \
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BRA BRN BHI BLS BCC BLO BNE BEQ BVC BVS BPL BMI BGE BLT BGT BLE \
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LEAXLEAYLEASLEAUPSHSPULSPSHUPULU?? RTS ABX RTI CWAIMUL ?? SWI \
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NEGA?? ?? COMALSRA?? RORAASRAASLAROLADECA?? INCATSTA?? CLRA\
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NEGB?? ?? COMBLSRB?? RORBASRBLSLBROLBDECB?? INCBTSTB?? CLRB\
|
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NEG ?? ?? COM LSR ?? ROR ASR ASL ROL DEC ?? INC TST JMP CLR \
|
||||
NEG ?? ?? COM LSR ?? ROR ASR ASL ROL DEC ?? INC TST JMP CLR \
|
||||
SUBACMPASBCASUBDANDABITALDA ?? EORAADCAORA ADDACMPXBSR LDX ?? \
|
||||
SUBACMPASBCASUBDANDABITALDA STA EORAADCAORA ADDACMPXJSR LDX STX \
|
||||
SUBACMPASBCASUBDANDABITALDA STA EORAADCAORA ADDACMPXJSR LDX STX \
|
||||
SUBACMPASBCASUBDANDABITALDA STA EORAADCAORA ADDACMPXJSR LDX STX \
|
||||
SUBBCMPBSBCBADDDANDBBITBLDB ?? EORBADCBORB ADDBLDD ?? LDU ?? \
|
||||
SUBBCMPBSBCBADDDANDBBITBLDB STB EORBADCBORB ADDBLDD STD LDU STU \
|
||||
SUBBCMPBSBCBADDDANDBBITBLDB STB EORBADCBORB ADDBLDD STD LDU STU \
|
||||
SUBBCMPBSBCBADDDANDBBITBLDB STB EORBADCBORB ADDBLDD STD LDU STU \
|
||||
?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? \
|
||||
?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? \
|
||||
?? LBRNLBHILBLSLBCCLBLOLBNELBEQLBVCLBVSLBPLLBMILBGELBLTLBGTLBLE\
|
||||
?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? SWI2\
|
||||
?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? \
|
||||
?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? \
|
||||
?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? \
|
||||
?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? \
|
||||
?? ?? ?? CMPD?? ?? ?? ?? ?? ?? ?? ?? CMPY?? LDY ?? \
|
||||
?? ?? ?? CMPD?? ?? ?? ?? ?? ?? ?? ?? CMPY?? LDY STY \
|
||||
?? ?? ?? CMPD?? ?? ?? ?? ?? ?? ?? ?? CMPY?? LDY STY \
|
||||
?? ?? ?? CMPD?? ?? ?? ?? ?? ?? ?? ?? CMPY?? LDY STY \
|
||||
?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? LDS ?? \
|
||||
?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? LDS STS \
|
||||
?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? LDS STS \
|
||||
?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? LDS STS \
|
||||
?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? \
|
||||
?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? \
|
||||
?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? \
|
||||
?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? SWI3\
|
||||
?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? \
|
||||
?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? \
|
||||
?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? \
|
||||
?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? \
|
||||
?? ?? ?? CMPU?? ?? ?? ?? ?? ?? ?? ?? CMPS?? ?? ?? \
|
||||
?? ?? ?? CMPU?? ?? ?? ?? ?? ?? ?? ?? CMPS?? ?? ?? \
|
||||
?? ?? ?? CMPU?? ?? ?? ?? ?? ?? ?? ?? CMPS?? ?? ?? \
|
||||
?? ?? ?? CMPU?? ?? ?? ?? ?? ?? ?? ?? CMPS?? ?? ?? \
|
||||
?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? \
|
||||
?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? \
|
||||
?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? \
|
||||
?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ";
|
||||
-- \
|
||||
?? \
|
||||
ABX \
|
||||
ADCA\
|
||||
ADCB\
|
||||
ADDA\
|
||||
ADDB\
|
||||
ADDD\
|
||||
ANDA\
|
||||
ANDB\
|
||||
ANDC\
|
||||
ASL \
|
||||
ASLA\
|
||||
ASR \
|
||||
ASRA\
|
||||
ASRB\
|
||||
BCC \
|
||||
BEQ \
|
||||
BGE \
|
||||
BGT \
|
||||
BHI \
|
||||
BITA\
|
||||
BITB\
|
||||
BLE \
|
||||
BLO \
|
||||
BLS \
|
||||
BLT \
|
||||
BMI \
|
||||
BNE \
|
||||
BPL \
|
||||
BRA \
|
||||
BRN \
|
||||
BSR \
|
||||
BVC \
|
||||
BVS \
|
||||
CLR \
|
||||
CLRA\
|
||||
CLRB\
|
||||
CMPA\
|
||||
CMPB\
|
||||
CMPD\
|
||||
CMPS\
|
||||
CMPU\
|
||||
CMPX\
|
||||
CMPY\
|
||||
COM \
|
||||
COMA\
|
||||
COMB\
|
||||
CWAI\
|
||||
DAA \
|
||||
DEC \
|
||||
DECA\
|
||||
DECB\
|
||||
EORA\
|
||||
EORB\
|
||||
EXG \
|
||||
INC \
|
||||
INCA\
|
||||
INCB\
|
||||
JMP \
|
||||
JSR \
|
||||
LBCC\
|
||||
LBEQ\
|
||||
LBGE\
|
||||
LBGT\
|
||||
LBHI\
|
||||
LBLE\
|
||||
LBLO\
|
||||
LBLS\
|
||||
LBLT\
|
||||
LBMI\
|
||||
LBNE\
|
||||
LBPL\
|
||||
LBRA\
|
||||
LBRN\
|
||||
LBSR\
|
||||
LBVC\
|
||||
LBVS\
|
||||
LDA \
|
||||
LDB \
|
||||
LDD \
|
||||
LDS \
|
||||
LDU \
|
||||
LDX \
|
||||
LDY \
|
||||
LEAS\
|
||||
LEAU\
|
||||
LEAX\
|
||||
LEAY\
|
||||
LSLB\
|
||||
LSR \
|
||||
LSRA\
|
||||
LSRB\
|
||||
MUL \
|
||||
NEG \
|
||||
NEGA\
|
||||
NEGB\
|
||||
NOP \
|
||||
ORA \
|
||||
ORB \
|
||||
ORCC\
|
||||
PSHS\
|
||||
PSHU\
|
||||
PULS\
|
||||
PULU\
|
||||
ROL \
|
||||
ROLA\
|
||||
ROLB\
|
||||
ROR \
|
||||
RORA\
|
||||
RORB\
|
||||
RTI \
|
||||
RTS \
|
||||
SBCA\
|
||||
SBCB\
|
||||
SEX \
|
||||
STA \
|
||||
STB \
|
||||
STD \
|
||||
STS \
|
||||
STU \
|
||||
STX \
|
||||
STY \
|
||||
SUBA\
|
||||
SUBB\
|
||||
SUBD\
|
||||
SWI \
|
||||
SWI2\
|
||||
SWI3\
|
||||
SYNC\
|
||||
TFR \
|
||||
TST \
|
||||
TSTA\
|
||||
TSTB";
|
||||
|
||||
|
||||
// The first byte is the opcode index
|
||||
// The second byte is <length><mode>
|
||||
// modes:
|
||||
// 1 immediate
|
||||
// 2 direct
|
||||
// 3 indexed
|
||||
// 4 extended
|
||||
// 5 inherent
|
||||
// 6 relative
|
||||
|
||||
unsigned char map0[] = {
|
||||
OP_NEG , 0x22,
|
||||
OP_XX , 0x22,
|
||||
OP_XX , 0x12,
|
||||
OP_COM , 0x22,
|
||||
OP_LSR , 0x22,
|
||||
OP_XX , 0x12,
|
||||
OP_ROR , 0x22,
|
||||
OP_ASR , 0x22,
|
||||
OP_ASL , 0x22,
|
||||
OP_ROL , 0x22,
|
||||
OP_DEC , 0x22,
|
||||
OP_XX , 0x12,
|
||||
OP_INC , 0x22,
|
||||
OP_TST , 0x22,
|
||||
OP_JMP , 0x22,
|
||||
OP_CLR , 0x22,
|
||||
OP_UU , 0x10,
|
||||
OP_UU , 0x10,
|
||||
OP_NOP , 0x15,
|
||||
OP_SYNC, 0x15,
|
||||
OP_XX , 0x10,
|
||||
OP_XX , 0x10,
|
||||
OP_LBRA, 0x36,
|
||||
OP_LBSR, 0x36,
|
||||
OP_XX , 0x10,
|
||||
OP_DAA , 0x15,
|
||||
OP_ORCC, 0x25,
|
||||
OP_XX , 0x10,
|
||||
OP_ANDC, 0x25,
|
||||
OP_SEX , 0x15,
|
||||
OP_EXG , 0x25,
|
||||
OP_TFR , 0x25,
|
||||
OP_BRA , 0x26,
|
||||
OP_BRN , 0x26,
|
||||
OP_BHI , 0x26,
|
||||
OP_BLS , 0x26,
|
||||
OP_BCC , 0x26,
|
||||
OP_BLO , 0x26,
|
||||
OP_BNE , 0x26,
|
||||
OP_BEQ , 0x26,
|
||||
OP_BVC , 0x26,
|
||||
OP_BVS , 0x26,
|
||||
OP_BPL , 0x26,
|
||||
OP_BMI , 0x26,
|
||||
OP_BGE , 0x26,
|
||||
OP_BLT , 0x26,
|
||||
OP_BGT , 0x26,
|
||||
OP_BLE , 0x26,
|
||||
OP_LEAX, 0x23,
|
||||
OP_LEAY, 0x23,
|
||||
OP_LEAS, 0x23,
|
||||
OP_LEAU, 0x23,
|
||||
OP_PSHS, 0x25,
|
||||
OP_PULS, 0x25,
|
||||
OP_PSHU, 0x25,
|
||||
OP_PULU, 0x25,
|
||||
OP_XX , 0x15,
|
||||
OP_RTS , 0x15,
|
||||
OP_ABX , 0x15,
|
||||
OP_RTI , 0x15,
|
||||
OP_CWAI, 0x25,
|
||||
OP_MUL , 0x15,
|
||||
OP_XX , 0x15,
|
||||
OP_SWI , 0x15,
|
||||
OP_NEGA, 0x15,
|
||||
OP_XX , 0x15,
|
||||
OP_XX , 0x15,
|
||||
OP_COMA, 0x15,
|
||||
OP_LSRA, 0x15,
|
||||
OP_XX , 0x15,
|
||||
OP_RORA, 0x15,
|
||||
OP_ASRA, 0x15,
|
||||
OP_ASLA, 0x15,
|
||||
OP_ROLA, 0x15,
|
||||
OP_DECA, 0x15,
|
||||
OP_XX , 0x15,
|
||||
OP_INCA, 0x15,
|
||||
OP_TSTA, 0x15,
|
||||
OP_XX , 0x15,
|
||||
OP_CLRA, 0x15,
|
||||
OP_NEGB, 0x15,
|
||||
OP_XX , 0x15,
|
||||
OP_XX , 0x15,
|
||||
OP_COMB, 0x15,
|
||||
OP_LSRB, 0x15,
|
||||
OP_XX , 0x15,
|
||||
OP_RORB, 0x15,
|
||||
OP_ASRB, 0x15,
|
||||
OP_LSLB, 0x15,
|
||||
OP_ROLB, 0x15,
|
||||
OP_DECB, 0x15,
|
||||
OP_XX , 0x15,
|
||||
OP_INCB, 0x15,
|
||||
OP_TSTB, 0x15,
|
||||
OP_XX , 0x15,
|
||||
OP_CLRB, 0x15,
|
||||
OP_NEG , 0x23,
|
||||
OP_XX , 0x13,
|
||||
OP_XX , 0x13,
|
||||
OP_COM , 0x23,
|
||||
OP_LSR , 0x23,
|
||||
OP_XX , 0x13,
|
||||
OP_ROR , 0x23,
|
||||
OP_ASR , 0x23,
|
||||
OP_ASL , 0x23,
|
||||
OP_ROL , 0x23,
|
||||
OP_DEC , 0x23,
|
||||
OP_XX , 0x13,
|
||||
OP_INC , 0x23,
|
||||
OP_TST , 0x23,
|
||||
OP_JMP , 0x23,
|
||||
OP_CLR , 0x23,
|
||||
OP_NEG , 0x34,
|
||||
OP_XX , 0x14,
|
||||
OP_XX , 0x14,
|
||||
OP_COM , 0x34,
|
||||
OP_LSR , 0x34,
|
||||
OP_XX , 0x14,
|
||||
OP_ROR , 0x34,
|
||||
OP_ASR , 0x34,
|
||||
OP_ASL , 0x34,
|
||||
OP_ROL , 0x34,
|
||||
OP_DEC , 0x34,
|
||||
OP_XX , 0x14,
|
||||
OP_INC , 0x34,
|
||||
OP_TST , 0x34,
|
||||
OP_JMP , 0x34,
|
||||
OP_CLR , 0x34,
|
||||
OP_SUBA, 0x21,
|
||||
OP_CMPA, 0x21,
|
||||
OP_SBCA, 0x21,
|
||||
OP_SUBD, 0x31,
|
||||
OP_ANDA, 0x21,
|
||||
OP_BITA, 0x21,
|
||||
OP_LDA , 0x21,
|
||||
OP_XX , 0x11,
|
||||
OP_EORA, 0x21,
|
||||
OP_ADCA, 0x21,
|
||||
OP_ORA , 0x21,
|
||||
OP_ADDA, 0x21,
|
||||
OP_CMPX, 0x31,
|
||||
OP_BSR , 0x26,
|
||||
OP_LDX , 0x31,
|
||||
OP_XX , 0x10,
|
||||
OP_SUBA, 0x22,
|
||||
OP_CMPA, 0x22,
|
||||
OP_SBCA, 0x22,
|
||||
OP_SUBD, 0x22,
|
||||
OP_ANDA, 0x22,
|
||||
OP_BITA, 0x22,
|
||||
OP_LDA , 0x22,
|
||||
OP_STA , 0x22,
|
||||
OP_EORA, 0x22,
|
||||
OP_ADCA, 0x22,
|
||||
OP_ORA , 0x22,
|
||||
OP_ADDA, 0x22,
|
||||
OP_CMPX, 0x22,
|
||||
OP_JSR , 0x22,
|
||||
OP_LDX , 0x22,
|
||||
OP_STX , 0x22,
|
||||
OP_SUBA, 0x23,
|
||||
OP_CMPA, 0x23,
|
||||
OP_SBCA, 0x23,
|
||||
OP_SUBD, 0x23,
|
||||
OP_ANDA, 0x23,
|
||||
OP_BITA, 0x23,
|
||||
OP_LDA , 0x23,
|
||||
OP_STA , 0x23,
|
||||
OP_EORA, 0x23,
|
||||
OP_ADCA, 0x23,
|
||||
OP_ORA , 0x23,
|
||||
OP_ADDA, 0x23,
|
||||
OP_CMPX, 0x23,
|
||||
OP_JSR , 0x23,
|
||||
OP_LDX , 0x23,
|
||||
OP_STX , 0x23,
|
||||
OP_SUBA, 0x34,
|
||||
OP_CMPA, 0x34,
|
||||
OP_SBCA, 0x34,
|
||||
OP_SUBD, 0x34,
|
||||
OP_ANDA, 0x34,
|
||||
OP_BITA, 0x34,
|
||||
OP_LDA , 0x34,
|
||||
OP_STA , 0x34,
|
||||
OP_EORA, 0x34,
|
||||
OP_ADCA, 0x34,
|
||||
OP_ORA , 0x34,
|
||||
OP_ADDA, 0x34,
|
||||
OP_CMPX, 0x34,
|
||||
OP_JSR , 0x34,
|
||||
OP_LDX , 0x34,
|
||||
OP_STX , 0x34,
|
||||
OP_SUBB, 0x21,
|
||||
OP_CMPB, 0x21,
|
||||
OP_SBCB, 0x21,
|
||||
OP_ADDD, 0x31,
|
||||
OP_ANDB, 0x21,
|
||||
OP_BITB, 0x21,
|
||||
OP_LDB , 0x21,
|
||||
OP_XX , 0x11,
|
||||
OP_EORB, 0x21,
|
||||
OP_ADCB, 0x21,
|
||||
OP_ORB , 0x21,
|
||||
OP_ADDB, 0x21,
|
||||
OP_LDD , 0x31,
|
||||
OP_XX , 0x11,
|
||||
OP_LDU , 0x31,
|
||||
OP_XX , 0x10,
|
||||
OP_SUBB, 0x22,
|
||||
OP_CMPB, 0x22,
|
||||
OP_SBCB, 0x22,
|
||||
OP_ADDD, 0x22,
|
||||
OP_ANDB, 0x22,
|
||||
OP_BITB, 0x22,
|
||||
OP_LDB , 0x22,
|
||||
OP_STB , 0x22,
|
||||
OP_EORB, 0x22,
|
||||
OP_ADCB, 0x22,
|
||||
OP_ORB , 0x22,
|
||||
OP_ADDB, 0x22,
|
||||
OP_LDD , 0x22,
|
||||
OP_STD , 0x22,
|
||||
OP_LDU , 0x22,
|
||||
OP_STU , 0x22,
|
||||
OP_SUBB, 0x23,
|
||||
OP_CMPB, 0x23,
|
||||
OP_SBCB, 0x23,
|
||||
OP_ADDD, 0x23,
|
||||
OP_ANDB, 0x23,
|
||||
OP_BITB, 0x23,
|
||||
OP_LDB , 0x23,
|
||||
OP_STB , 0x23,
|
||||
OP_EORB, 0x23,
|
||||
OP_ADCB, 0x23,
|
||||
OP_ORB , 0x23,
|
||||
OP_ADDB, 0x23,
|
||||
OP_LDD , 0x23,
|
||||
OP_STD , 0x23,
|
||||
OP_LDU , 0x23,
|
||||
OP_STU , 0x23,
|
||||
OP_SUBB, 0x34,
|
||||
OP_CMPB, 0x34,
|
||||
OP_SBCB, 0x34,
|
||||
OP_ADDD, 0x34,
|
||||
OP_ANDB, 0x34,
|
||||
OP_BITB, 0x34,
|
||||
OP_LDB , 0x34,
|
||||
OP_STB , 0x34,
|
||||
OP_EORB, 0x34,
|
||||
OP_ADCB, 0x34,
|
||||
OP_ORB , 0x34,
|
||||
OP_ADDB, 0x34,
|
||||
OP_LDD , 0x34,
|
||||
OP_STD , 0x34,
|
||||
OP_LDU , 0x34,
|
||||
OP_STU , 0x34,
|
||||
};
|
||||
|
||||
unsigned char map1[] = {
|
||||
33, OP_LBRN, 0x46,
|
||||
34, OP_LBHI, 0x46,
|
||||
35, OP_LBLS, 0x46,
|
||||
36, OP_LBCC, 0x46,
|
||||
37, OP_LBLO, 0x46,
|
||||
38, OP_LBNE, 0x46,
|
||||
39, OP_LBEQ, 0x46,
|
||||
40, OP_LBVC, 0x46,
|
||||
41, OP_LBVS, 0x46,
|
||||
42, OP_LBPL, 0x46,
|
||||
43, OP_LBMI, 0x46,
|
||||
44, OP_LBGE, 0x46,
|
||||
45, OP_LBLT, 0x46,
|
||||
46, OP_LBGT, 0x46,
|
||||
47, OP_LBLE, 0x46,
|
||||
63, OP_SWI2, 0x25,
|
||||
131, OP_CMPD, 0x41,
|
||||
140, OP_CMPY, 0x41,
|
||||
142, OP_LDY , 0x41,
|
||||
147, OP_CMPD, 0x32,
|
||||
156, OP_CMPY, 0x32,
|
||||
158, OP_LDY , 0x32,
|
||||
159, OP_STY , 0x32,
|
||||
163, OP_CMPD, 0x33,
|
||||
172, OP_CMPY, 0x33,
|
||||
174, OP_LDY , 0x33,
|
||||
175, OP_STY , 0x33,
|
||||
179, OP_CMPD, 0x44,
|
||||
188, OP_CMPY, 0x44,
|
||||
190, OP_LDY , 0x44,
|
||||
191, OP_STY , 0x44,
|
||||
206, OP_LDS , 0x41,
|
||||
222, OP_LDS , 0x32,
|
||||
223, OP_STS , 0x32,
|
||||
238, OP_LDS , 0x33,
|
||||
239, OP_STS , 0x33,
|
||||
254, OP_LDS , 0x44,
|
||||
255, OP_STS , 0x44,
|
||||
};
|
||||
|
||||
unsigned char map2[] = {
|
||||
63, OP_SWI3, 0x25,
|
||||
131, OP_CMPU, 0x41,
|
||||
140, OP_CMPS, 0x41,
|
||||
147, OP_CMPU, 0x32,
|
||||
156, OP_CMPS, 0x32,
|
||||
163, OP_CMPU, 0x33,
|
||||
172, OP_CMPS, 0x33,
|
||||
179, OP_CMPU, 0x44,
|
||||
188, OP_CMPS, 0x44,
|
||||
255, OP_XX , 0x10
|
||||
};
|
||||
|
||||
static const char regi[] = { 'X', 'Y', 'U', 'S' };
|
||||
|
||||
@ -247,7 +678,7 @@ char *hex16str(tt_u16 v)
|
||||
return tmpbuf;
|
||||
}
|
||||
|
||||
static const char ccbits[] = "EFHINZVC";
|
||||
extern char *statusString;
|
||||
|
||||
char *ccstr(tt_u8 val)
|
||||
{
|
||||
@ -256,7 +687,7 @@ char *ccstr(tt_u8 val)
|
||||
|
||||
for (i = 0; i < 8; i++) {
|
||||
if (val & 0x80)
|
||||
tempbuf[i] = ccbits[i];
|
||||
tempbuf[i] = statusString[i];
|
||||
else
|
||||
tempbuf[i] = '.';
|
||||
val <<= 1;
|
||||
@ -271,25 +702,61 @@ unsigned int disassemble(unsigned int addr)
|
||||
int s, i;
|
||||
tt_u8 pb;
|
||||
char reg;
|
||||
unsigned char *map = NULL;
|
||||
|
||||
// Default for most undefined opcodes
|
||||
unsigned char sm = 0x10; // size_mode byte
|
||||
unsigned char oi = OP_XX; // opcode index
|
||||
|
||||
FILE *stream = &ser0stream;
|
||||
|
||||
fprintf(stream, "%04hX: %04hX %04hX ", addr, get_memw(addr), get_memw(addr + 2));
|
||||
if (d == 0x10) {
|
||||
d = get_memb(addr + 1);
|
||||
map = map1;
|
||||
}
|
||||
|
||||
if (d == 0x11) {
|
||||
d = get_memb(addr + 1);
|
||||
map = map2;
|
||||
}
|
||||
|
||||
if (map) {
|
||||
// Search for the opcode in map1 or map2
|
||||
map -= 3;
|
||||
do {
|
||||
map += 3;
|
||||
if (*map == d) {
|
||||
oi = *++map;
|
||||
sm = *++map;
|
||||
break;
|
||||
}
|
||||
} while (*map < 255);
|
||||
} else {
|
||||
// Lookup directly in map0
|
||||
map = map0 + 2 * d;
|
||||
oi = *map++;
|
||||
sm = *map++;
|
||||
}
|
||||
|
||||
s = sm >> 4;
|
||||
|
||||
fprintf(stream, "%04X ", addr);
|
||||
|
||||
for (i = 0; i < s; i++) {
|
||||
fputs(hex8str(get_memb(addr + i)), stream);
|
||||
fputc(' ', stream);
|
||||
}
|
||||
for (i = s; i < 4; i++) {
|
||||
fputs(" ", stream);
|
||||
}
|
||||
|
||||
if (d == 0x10)
|
||||
d = get_memb(addr + 1) + 0x100;
|
||||
|
||||
if (d == 0x11)
|
||||
d = get_memb(addr + 1) + 0x200;
|
||||
|
||||
for (i = 0; i < 4; i++)
|
||||
fputc(inst[d * 4 + i], stream);
|
||||
fputc(inst[oi * 4 + i], stream);
|
||||
|
||||
fputs(" ", stream);
|
||||
|
||||
s = size[d];
|
||||
|
||||
switch(mode[d]) {
|
||||
switch(sm & 15) {
|
||||
case 1: /* immediate */
|
||||
fputs("#$", stream);
|
||||
if (s == 2)
|
||||
@ -298,7 +765,7 @@ unsigned int disassemble(unsigned int addr)
|
||||
fputs(hex16str(get_memw(addr + s - 2)), stream);
|
||||
break;
|
||||
case 2: /* direct */
|
||||
fputs("<$", stream);
|
||||
fputs("$", stream);
|
||||
fputs(hex8str(get_memb(addr + s - 1)), stream);
|
||||
break;
|
||||
case 3: /* indexed */
|
||||
@ -338,22 +805,22 @@ unsigned int disassemble(unsigned int addr)
|
||||
break;
|
||||
case 8: /* n7,R */
|
||||
s += 1;
|
||||
fprintf(stream, "<$%s,%c", hex8str(get_memb(addr + s - 1)), reg);
|
||||
fprintf(stream, "$%s,%c", hex8str(get_memb(addr + s - 1)), reg);
|
||||
break;
|
||||
case 9: /* n15,R */
|
||||
s += 2;
|
||||
fprintf(stream, ">$%s,%c", hex16str(get_memw(addr + s - 2)), reg);
|
||||
fprintf(stream, "$%s,%c", hex16str(get_memw(addr + s - 2)), reg);
|
||||
break;
|
||||
case 11: /* D,R */
|
||||
fprintf(stream, "D,%c", reg);
|
||||
break;
|
||||
case 12: /* n7,PCR */
|
||||
s += 1;
|
||||
fprintf(stream, "<$%s,PCR", hex8str(get_memb(addr + s - 1)));
|
||||
fprintf(stream, "$%s,PCR", hex8str(get_memb(addr + s - 1)));
|
||||
break;
|
||||
case 13: /* n15,PCR */
|
||||
s += 2;
|
||||
fprintf(stream, ">$%s,PCR", hex16str(get_memw(addr + s - 2)));
|
||||
fprintf(stream, "$%s,PCR", hex16str(get_memw(addr + s - 2)));
|
||||
break;
|
||||
case 15: /* [n] */
|
||||
s += 2;
|
||||
@ -367,7 +834,7 @@ unsigned int disassemble(unsigned int addr)
|
||||
}
|
||||
break;
|
||||
case 4: /* extended */
|
||||
fprintf(stream, ">$%s", hex16str(get_memw(addr + s - 2)));
|
||||
fprintf(stream, "$%s", hex16str(get_memw(addr + s - 2)));
|
||||
break;
|
||||
case 5: /* inherent */
|
||||
pb = get_memb(addr + 1);
|
||||
@ -448,7 +915,7 @@ unsigned int disassemble(unsigned int addr)
|
||||
v = (tt_s16)(tt_s8)get_memb(addr + 1);
|
||||
else
|
||||
v = (tt_s16)get_memw(addr + s - 2);
|
||||
fprintf(stream, ">$%s", hex16str(addr + (tt_u16)s + v));
|
||||
fprintf(stream, "$%s", hex16str(addr + (tt_u16)s + v));
|
||||
break;
|
||||
}
|
||||
}
|
||||
@ -456,32 +923,3 @@ unsigned int disassemble(unsigned int addr)
|
||||
|
||||
return addr + s;
|
||||
}
|
||||
|
||||
#else
|
||||
|
||||
unsigned int disassemble(unsigned int addr) {
|
||||
int i;
|
||||
int s;
|
||||
int d = get_memb(addr);
|
||||
|
||||
if (d == 0x10)
|
||||
d = get_memb(addr + 1) + 0x100;
|
||||
|
||||
if (d == 0x11)
|
||||
d = get_memb(addr + 1) + 0x200;
|
||||
|
||||
s = size[d];
|
||||
|
||||
log0("%04X ", addr);
|
||||
for (i = 0; i < s; i++) {
|
||||
log0("%02X ", get_memb(addr + i));
|
||||
}
|
||||
log0("\n");
|
||||
return addr + s;
|
||||
}
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user