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https://github.com/RevCurtisP/C02.git
synced 2024-11-22 01:31:33 +00:00
Added BBR, BBS, RMB, SMB Instructions to A02 Assembler
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fa6daed904
commit
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35
a02.c
35
a02.c
@ -439,23 +439,40 @@ int chkmod(int mode) {
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}
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/* Assemble Branch Opcode */
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void asmbrn(void) {
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void asmbrn(int setzp) {
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int offset = 0;
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int ofsadj = (setzp) ? 2 : 3; //Offset Adjustment
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if (debug) printf("Assembling Branch Opcode Token 0x%02X\n", token);
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zpage = TRUE;
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zpage = setzp;
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if (isalpha(*linptr) || *linptr =='.') {
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struct sym *target = evlsym();
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if (target) offset = (target->value - curadr - 2);
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if (target) offset = (target->value - curadr - ofsadj);
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}
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else if (cpychr('+')) offset = evlopd(0xFF);
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else if (cpychr('-')) offset = -evlopd(0xFF);
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else xerror("Illegal Branch Operand\n", "");
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else {
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opval = evlopd(0xFFFF);
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if (opval < 0) xerror("Illegal Branch Operand\n", "");
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offset = opval - curadr - 2;
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}
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if (debug) printf("Calculated Branch Offset of %d\n", offset);
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if ((offset > 127 || offset < -128) && passno == 2)
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xerror("Branch Out of Range\n", "");
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if (debug) printf("Branch Offset %d\n", offset);
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opval = offset & 0xFF;
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}
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/* Assemble Zero Page, Relative Opcode */
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void asmzpr(void) {
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int bitno = -1;
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if (debug) printf("Assembling ZeroPage (Relative) Opcode Token 0x%02X\n", token);
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if (strlen(mnmnc) < 4) {opmod = evlopd(7) << 4; cpychr(','); skpspc();} //Set Modifier to Bit Position
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int zpval = evlopd(0xFF); cpychr(','); skpspc();//Get ZeroPage Operand
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if (zpval < 0) xerror ("Instruction %s requires Multiple Operands\n", mnmnc);
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if (amode == 0x0004) {zpage = TRUE; opval = zpval;} //RMB, SMB - Zero Page Operand
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else {asmbrn(FALSE); opval = opval << 8 | zpval;} //BBR, BBS - Combine Operanda
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}
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/* Assemble Immediate Mode Instruction */
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void asmimd(void) {
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if (debug) printf("Assembling Immediate Opcode Token 0x%02X\n", token);
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@ -513,8 +530,10 @@ unsigned char fixopc(void) {
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/* Ouput Opcode debug Info */
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void dbgopc(void) {
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if (debug) printf("token=$%02X, opmod=$%02X, Address Mode: ", token, opmod);
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switch (opmod) {
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printf("token=$%02X, opmod=$%02X, Address Mode: ", token, opmod);
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if (amode == 0x1004) puts("ZeroPage, Relative");
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else if (amode == 0x0004) puts("ZeroPage");
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else switch (opmod) {
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case 0x00: if (amode == IMPLD) puts("Implied"); else puts("(Indirect,X)"); break;
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case 0x08: if (opval < 0) puts("Accumulator"); else puts("#Immediate"); break;
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case 0x10: puts("(Indirect),Y"); break;
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@ -542,7 +561,8 @@ int asmopc(int dot) {
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if (debug) printf("Assembling Opcode Token 0x%02X, ", token);
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if (debug) printf("Addressing Mode Mask 0x%04X\n", amode);
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skpspc();
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if (amode == RELTV) asmbrn(); //Branch (Relative) Instruction
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if (amode == RELTV) asmbrn(TRUE); //Branch (Relative) Instruction
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else if (amode == 0x0004 || amode == 0x1004) asmzpr(); //Branch (Relative) Instruction
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else if (cpychr('#')) asmimd(); //Assemble Implied Instruction
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else if (cpychr('(')) asmind(); //Assemble Indirect Instruction
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else asmiaz(); //Assemble Implied/Accumulator/Absolute/ZeroPage Instruction
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@ -550,6 +570,7 @@ int asmopc(int dot) {
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int opcode = fixopc();
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if (debug) printf("Writing OpCode $%02X\n", opcode);
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outbyt(opcode);
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if (debug) printf("Writing %s Operand %d\n", zpgabs[-zpage], opval);
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if (opval >= 0) {
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if (zpage) outbyt(opval); //Byte Operand
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else outwrd(opval); //Word Operand
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14
a02.h
14
a02.h
@ -22,6 +22,8 @@
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#define INDCY 0x0800 //(Indirect),Y
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#define RELTV 0x1000 //Relative
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char zpgabs[][] = {"Absolute", "ZeroPage"};
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struct amd {int amode; char desc[12];};
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struct amd amdesc[] = {
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{ACMLT, "Accumulator"},
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@ -67,6 +69,18 @@ struct opc opclst[] = {
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{"ASL", 0x02, 0x007D}, {"ROL", 0x22, 0x007D}, {"INC", 0xE2, 0x007D}, {"LSR", 0x42, 0x007D},
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{"ROR", 0x62, 0x007D}, {"DEC", 0xC2, 0x007D},
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{"RMB0", 0x07, 0x0004}, {"RMB1", 0x17, 0x0004}, {"RMB2", 0x27, 0x0004}, {"RMB3", 0x37, 0x0004},
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{"RMB4", 0x47, 0x0004}, {"RMB5", 0x57, 0x0004}, {"RMB6", 0x67, 0x0004}, {"RMB7", 0x77, 0x0004},
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{"SMB0", 0x87, 0x0004}, {"SMB1", 0x97, 0x0004}, {"SMB2", 0xA7, 0x0004}, {"SMB3", 0xB7, 0x0004},
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{"SMB4", 0xC7, 0x0004}, {"SMB5", 0xD7, 0x0004}, {"SMB6", 0xE7, 0x0004}, {"SMB7", 0xF7, 0x0004},
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{"RMB", 0x07, 0x0004}, {"SMB", 0x87, 0x0004},
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{"BBR0", 0x0F, 0x1004}, {"BBR1", 0x1F, 0x1004}, {"BBR2", 0x2F, 0x1004}, {"BBR3", 0x3F, 0x1004},
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{"BBR4", 0x4F, 0x1004}, {"BBR5", 0x5F, 0x1004}, {"BBR6", 0x6F, 0x1004}, {"BBR7", 0x7F, 0x1004},
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{"BBS0", 0x8F, 0x1004}, {"BBS1", 0x9F, 0x1004}, {"BBS2", 0xAF, 0x1004}, {"BBS3", 0xBF, 0x1004},
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{"BBS4", 0xCF, 0x1004}, {"BBS5", 0xDF, 0x1004}, {"BBS6", 0xEF, 0x1004}, {"BBS7", 0xFF, 0x1004},
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{"BBR", 0x0F, 0x1004}, {"BBS", 0x8F, 0x1004},
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{"TRB", 0x10, 0x0024}, {"TSB", 0x00, 0x0024},
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{"CPX", 0xE0, 0x0026}, {"CPY", 0xC0, 0x0026},
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{"LDX", 0xA2, 0x00A6}, {"STX", 0x82, 0x00A6},
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