2024-03-20 18:25:20 +00:00
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//
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2024-03-27 01:33:46 +00:00
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// CMOSRAM.hpp
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// Clock Signal
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2024-03-20 18:25:20 +00:00
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//
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2024-03-27 01:33:46 +00:00
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// Created by Thomas Harte on 20/03/2024.
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// Copyright © 2024 Thomas Harte. All rights reserved.
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2024-03-20 18:25:20 +00:00
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//
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#pragma once
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#include "../../../Components/I2C/I2C.hpp"
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#include "../../../Outputs/Log.hpp"
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2024-03-29 01:31:07 +00:00
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#include <array>
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2024-03-20 18:25:20 +00:00
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namespace Archimedes {
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struct CMOSRAM: public I2C::Peripheral {
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CMOSRAM() {
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ram_ = default_ram;
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}
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2024-03-26 16:24:24 +00:00
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void start(bool is_read) override {
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expecting_address_ = !is_read;
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}
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2024-03-29 01:23:49 +00:00
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// TODO: first 16 addresses are registers, not RAM.
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std::optional<uint8_t> read() override {
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if(address_ < 16) {
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logger.error().append("TODO: read at %d", address_);
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}
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2024-03-29 01:23:49 +00:00
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const uint8_t result = ram_[address_];
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++address_;
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return result;
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}
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2024-03-27 01:52:29 +00:00
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bool write(uint8_t value) override {
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if(expecting_address_) {
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address_ = value;
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expecting_address_ = false;
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return true;
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}
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if(address_ < 16) {
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logger.error().append("TODO: write at %d", address_);
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return true;
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}
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ram_[address_] = value;
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++address_;
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return true;
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}
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private:
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bool expecting_address_ = false;
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uint8_t address_;
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std::array<uint8_t, 256> ram_{};
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// This is the default contents of RAM as written by RISC OS 3.11.
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static constexpr std::array<uint8_t, 256> default_ram = {
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x03, 0x14, 0x00, 0x6f, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x6d,
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0x00, 0xfe, 0x00, 0xeb, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x10, 0x50, 0x20, 0x08, 0x0a, 0x2c,
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0x80, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x5c, 0x13, 0x00, 0x00, 0x04, 0xfd, 0x08, 0x01, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0a, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
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};
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2024-03-29 01:31:07 +00:00
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Log::Logger<Log::Source::CMOSRTC> logger;
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2024-03-20 18:25:20 +00:00
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};
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}
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