6502/CLK
1
0
Fork 0
mirror of https://github.com/TomHarte/CLK.git synced 2024-09-30 22:56:03 +00:00
Code Issues Projects Releases Wiki Activity

This is probably a valid test. But I'm not completely sure. Time to figure out what's happening on the 1540 end.

Browse Source
This commit is contained in:
Thomas Harte 2016-07-09 18:01:04 -04:00
parent cd84c35552
commit 01746f0512
1 changed files with 8 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

12
OSBindings/Mac/Clock SignalTests/C1540Tests.swift
View File

@ -32,16 +32,20 @@ class C1540Tests: XCTestCase {
c1540.runForCycles(256) // this isn't time limited on real hardware
XCTAssert(c1540.dataLine == true, "Listener should have let data line go high again")
for _ in 0..<8 {
// ensure the closk is true again
c1540.clockLine = true
c1540.runForCycles(40)
// set up for byte transfer
c1540.clockLine = false
c1540.dataLine = true
c1540.runForCycles(40)
// transmit bits
for _ in 0..<8 {
// load data line
c1540.dataLine = (shiftedValue & 1) == 0
shiftedValue >>= 1
// toggle clock
c1540.clockLine = true
c1540.runForCycles(40)
c1540.clockLine = false
c1540.runForCycles(40)
}