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https://github.com/TomHarte/CLK.git
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Tries to add semantic meaning to the various auxiliary control fields.
To consider: decoding at set?
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@ -86,7 +86,7 @@ template <typename T> void MOS6522<T>::write(int address, uint8_t value) {
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timer_is_running_[0] = true;
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// If PB7 output mode is active, set it low.
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if(registers_.auxiliary_control & 0x80) {
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if(timer1_is_controlling_pb7()) {
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registers_.timer_port_b_output &= 0x7f;
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evaluate_port_b_output();
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}
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@ -120,9 +120,11 @@ template <typename T> void MOS6522<T>::write(int address, uint8_t value) {
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registers_.auxiliary_control = value;
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evaluate_cb2_output();
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printf("Shift mode: %d\n", shift_mode());
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// This is a bit of a guess: reset the timer-based PB7 output to its default high level
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// any timer that timer-linked PB7 output is disabled.
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if(!(registers_.auxiliary_control & 0x80)) {
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if(!timer1_is_controlling_pb7()) {
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registers_.timer_port_b_output |= 0x80;
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}
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evaluate_port_b_output();
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@ -304,16 +306,13 @@ template <typename T> void MOS6522<T>::do_phase2() {
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registers_.timer_needs_reload = false;
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registers_.timer[0] = registers_.timer_latch[0];
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} else {
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// Decrement timer 1 based on clock if enabled.
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if(!(registers_.auxiliary_control & 0x20)) {
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-- registers_.timer[0];
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}
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-- registers_.timer[0];
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}
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// Count down timer 2 if it is in timed interrupt mode (i.e. auxiliary control bit 5 is clear).
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// TODO: implement count down on PB6 if this bit isn't set.
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registers_.timer[1] -= 1 ^ ((registers_.auxiliary_control >> 5)&1);
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registers_.timer[1] -= timer2_clock_decrement();
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// TODO: can eliminate conditional branches here.
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if(registers_.next_timer[0] >= 0) {
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registers_.timer[0] = uint16_t(registers_.next_timer[0]);
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registers_.next_timer[0] = -1;
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@ -364,13 +363,13 @@ template <typename T> void MOS6522<T>::do_phase1() {
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reevaluate_interrupts();
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// Determine whether to reload.
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if(registers_.auxiliary_control&0x40)
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if(timer1_is_continuous())
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registers_.timer_needs_reload = true;
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else
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timer_is_running_[0] = false;
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// Determine whether to toggle PB7.
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if(registers_.auxiliary_control&0x80) {
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if(timer1_is_controlling_pb7()) {
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registers_.timer_port_b_output ^= 0x80;
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bus_handler_.run_for(time_since_bus_handler_call_.flush<HalfCycles>());
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evaluate_port_b_output();
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@ -481,10 +480,11 @@ template <typename T> void MOS6522<T>::shift_in() {
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}
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template <typename T> void MOS6522<T>::shift_out() {
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// When shifting out, the shift register rotates rather than strictly shifts.
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// TODO: is that true for all modes?
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if(shift_mode() == ShiftMode::OutUnderT2FreeRunning || shift_bits_remaining_) {
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registers_.shift = uint8_t((registers_.shift << 1) | (registers_.shift >> 7));
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const bool is_free_running = shift_mode() == ShiftMode::OutUnderT2FreeRunning;
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if(is_free_running || shift_bits_remaining_) {
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// Recirculate bits only if in free-running mode (?)
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const uint8_t incoming_bit = (registers_.shift >> 7) * is_free_running;
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registers_.shift = uint8_t(registers_.shift << 1) | incoming_bit;
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evaluate_cb2_output();
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--shift_bits_remaining_;
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@ -81,12 +81,30 @@ class MOS6522Storage {
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OutUnderPhase2 = 6,
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OutUnderCB1 = 7
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};
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ShiftMode shift_mode() const {
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return ShiftMode((registers_.auxiliary_control >> 2) & 7);
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bool timer1_is_controlling_pb7() const {
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return registers_.auxiliary_control & 0x80;
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}
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bool timer1_is_continuous() const {
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return registers_.auxiliary_control & 0x40;
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}
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bool is_shifting_out() const {
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return registers_.auxiliary_control & 0x10;
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}
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int timer2_clock_decrement() const {
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return 1 ^ ((registers_.auxiliary_control >> 5)&1);
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}
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int timer2_pb6_decrement() const {
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return (registers_.auxiliary_control >> 5)&1;
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}
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ShiftMode shift_mode() const {
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return ShiftMode((registers_.auxiliary_control >> 2) & 7);
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}
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bool portb_is_latched() const {
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return registers_.auxiliary_control & 0x02;
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}
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bool port1_is_latched() const {
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return registers_.auxiliary_control & 0x01;
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}
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};
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}
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