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Add MUL/DIV tests and exclusions.

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This commit is contained in:
Thomas Harte 2022-04-22 09:47:16 -04:00
parent 977192f480
commit 06fb502047
2 changed files with 15 additions and 3 deletions
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10
InstructionSets/68k/Decoder.cpp
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@ -408,6 +408,16 @@ template <uint8_t op, bool validate> Preinstruction Predecoder<model>::validated
case AddressingMode::None:
return Preinstruction();
}
case OpT(Operation::DIVU): case OpT(Operation::DIVS):
case OpT(Operation::MULU): case OpT(Operation::MULS):
switch(original.mode<0>()) {
default: return original;
case AddressingMode::AddressRegisterDirect:
case AddressingMode::None:
return Preinstruction();
}
}
}

8
OSBindings/Mac/Clock SignalTests/m68kDecoderTests.mm
View File

@ -241,12 +241,14 @@ template <int index> NSString *operand(Preinstruction instruction, uint16_t opco
// case Operation::ORw: instruction = @"OR.w"; break;
// case Operation::ORl: instruction = @"OR.l"; break;
case Operation::MULU: instruction = @"MULU"; break;
case Operation::MULS: instruction = @"MULS"; break;
case Operation::DIVU: instruction = @"DIVU"; break;
case Operation::DIVS: instruction = @"DIVS"; break;
/*
TODO:
MULU, MULS,
DIVU, DIVS,
RTE, RTR,
TRAP, TRAPV,