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https://github.com/TomHarte/CLK.git
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Execution now runs into a prefetch abort loop.
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@ -549,6 +549,11 @@ struct Executor {
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return registers_;
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}
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/// Indicates a prefetch abort exception.
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void prefetch_abort() {
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registers_.exception<Registers::Exception::PrefetchAbort>();
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}
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/// Sets the expected address of the instruction after whichever is about to be executed.
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/// So it's PC+4 compared to most other systems.
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void set_pc(uint32_t pc) {
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@ -95,7 +95,7 @@ struct Memory {
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low_rom_access_time_ = ROMAccessTime((address >> 4) & 3);
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page_size_ = PageSize((address >> 2) & 3);
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logger.info().append("MEMC Control: OS:%d sound:%d video:%d ", os_mode_, sound_dma_enable_, video_dma_enable_);
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logger.info().append("MEMC Control: %08x/%08x -> OS:%d sound:%d video:%d high:%d low:%d size:%d", address, source, os_mode_, sound_dma_enable_, video_dma_enable_, high_rom_access_time_, low_rom_access_time_, page_size_);
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return true;
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} else {
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@ -313,8 +313,13 @@ class ConcreteMachine:
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auto instructions = cycles.as<int>();
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while(instructions--) {
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uint32_t instruction;
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executor_.bus.read(executor_.pc(), instruction, executor_.registers().mode(), false);
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// TODO: what if abort? How about pipeline prefetch?
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if(!executor_.bus.read(executor_.pc(), instruction, executor_.registers().mode(), false)) {
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executor_.prefetch_abort();
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// TODO: does a double abort cause a reset?
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executor_.bus.read(executor_.pc(), instruction, executor_.registers().mode(), false);
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}
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// TODO: pipeline prefetch?
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logger.info().append("%08x: %08x", executor_.pc(), instruction);
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InstructionSet::ARM::execute<arm_model>(instruction, executor_);
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