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Disables a couple of now-trustworthy LOGs.
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5463cd1ae3
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@ -127,7 +127,7 @@ class ConcreteMachine:
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if(!(address & 0x2000)) chipset_.cia_b.write(reg, cycle.value8_high());
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}
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LOG("CIA " << (((address >> 12) & 3)^3) << " " << (cycle.operation & Microcycle::Read ? "read " : "write ") << std::dec << (reg & 0xf) << " of " << PADHEX(2) << +cycle.value8_low());
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// LOG("CIA " << (((address >> 12) & 3)^3) << " " << (cycle.operation & Microcycle::Read ? "read " : "write ") << std::dec << (reg & 0xf) << " of " << PADHEX(2) << +cycle.value8_low());
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} else if(address >= 0xdf'f000 && address <= 0xdf'f1be) {
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chipset_.perform(cycle);
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} else {
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@ -563,7 +563,7 @@ void Chipset::perform(const CPU::MC68000::Microcycle &cycle) {
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case Write(0x09a):
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ApplySetClear(interrupt_enable_);
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update_interrupts();
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LOG("Interrupt enable mask modified by " << PADHEX(4) << cycle.value16() << "; is now " << std::bitset<16>{interrupt_enable_});
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// LOG("Interrupt enable mask modified by " << PADHEX(4) << cycle.value16() << "; is now " << std::bitset<16>{interrupt_enable_});
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break;
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case Read(0x01c):
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cycle.set_value16(interrupt_enable_);
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@ -757,7 +757,7 @@ void Chipset::perform(const CPU::MC68000::Microcycle &cycle) {
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case Write(0x1a8): case Write(0x1aa): case Write(0x1ac): case Write(0x1ae):
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case Write(0x1b0): case Write(0x1b2): case Write(0x1b4): case Write(0x1b6):
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case Write(0x1b8): case Write(0x1ba): case Write(0x1bc): case Write(0x1be): {
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LOG("Colour palette; " << PADHEX(4) << cycle.value16() << " to " << *cycle.address);
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// LOG("Colour palette; " << PADHEX(4) << cycle.value16() << " to " << *cycle.address);
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// Store once in regular, linear order.
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const auto entry_address = (register_address - 0x180) >> 1;
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