mirror of
https://github.com/TomHarte/CLK.git
synced 2024-07-06 01:28:57 +00:00
Performed light syntactic cleaning on the first part of the base page table, eliminated redundant temporary variables, implemented 8-bit increment and decrement.
This commit is contained in:
Thomas Harte
parent
103c863534
commit
11cfaa3e3d
@ -83,7 +83,9 @@ struct MicroOp {
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DecodeOperation,
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MoveToNextProgram,
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Increment8,
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Increment16,
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Decrement8,
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Decrement16,
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Move8,
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Move16,
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@ -109,6 +111,10 @@ struct MicroOp {
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LDIR,
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RLA, RLCA, RRA, RRCA,
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RLC, RRC, RL, RR,
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SLA, SRA, SLL, SRL,
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SetInstructionPage,
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None
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@ -141,7 +147,8 @@ template <class T> class Processor: public MicroOpScheduler<MicroOp> {
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const MicroOp **program_table_;
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uint8_t operation_;
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RegisterPair address_, temporary_;
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RegisterPair temp16_;
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uint8_t temp8_;
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MicroOp **current_instruction_page_;
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MicroOp *base_page_[256];
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@ -161,7 +168,7 @@ template <class T> class Processor: public MicroOpScheduler<MicroOp> {
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#define PUSH(x) {MicroOp::Decrement16, &sp_.full}, STOREL(x.bytes.high, sp_), {MicroOp::Decrement16, &sp_.full}, STOREL(x.bytes.low, sp_)
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#define POP(x) FETCHL(x.bytes.low, sp_), {MicroOp::Increment16, &sp_.full}, FETCHL(x.bytes.high, sp_), {MicroOp::Increment16, &sp_.full}
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#define JP(cc) Program(FETCH16(address_, pc_), {MicroOp::cc}, {MicroOp::Move16, &address_.full, &pc_.full})
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#define JP(cc) Program(FETCH16(temp16_, pc_), {MicroOp::cc}, {MicroOp::Move16, &temp16_.full, &pc_.full})
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#define LD(a, b) Program({MicroOp::Move8, &b, &a})
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#define LD_GROUP(r) \
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@ -172,7 +179,7 @@ template <class T> class Processor: public MicroOpScheduler<MicroOp> {
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Program({MicroOp::op, &bc_.bytes.high}), Program({MicroOp::op, &bc_.bytes.low}), \
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Program({MicroOp::op, &de_.bytes.high}), Program({MicroOp::op, &de_.bytes.low}), \
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Program({MicroOp::op, &hl_.bytes.high}), Program({MicroOp::op, &hl_.bytes.low}), \
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Program(FETCHL(temporary_.bytes.low, hl_), {MicroOp::op, &temporary_.bytes.low}), \
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Program(FETCHL(temp8_, hl_), {MicroOp::op, &temp8_}), \
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Program({MicroOp::op, &a_})
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#define ADD16(d, s) Program(WAIT(4), WAIT(3), {MicroOp::Add16, &s.full, &d.full})
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@ -202,7 +209,7 @@ template <class T> class Processor: public MicroOpScheduler<MicroOp> {
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NOP_ROW(), /* 0x80 */
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NOP_ROW(), /* 0x90 */
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NOP_ROW(), /* 0xa0 */
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/* 0xb0 LDIR */ Program(FETCHL(temporary_.bytes.low, hl_), STOREL(temporary_.bytes.low, de_), WAIT(2), {MicroOp::LDIR}, WAIT(5)), /* 0xb1 CPIR */ XX,
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/* 0xb0 LDIR */ Program(FETCHL(temp8_, hl_), STOREL(temp8_, de_), WAIT(2), {MicroOp::LDIR}, WAIT(5)), /* 0xb1 CPIR */ XX,
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/* 0xb2 INIR */ XX, /* 0xb3 OTIR */ XX,
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XX, XX, XX, XX,
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/* 0xb8 LDDR */ XX, /* 0xb9 CPDR */ XX,
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@ -218,77 +225,95 @@ template <class T> class Processor: public MicroOpScheduler<MicroOp> {
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}
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void assemble_base_page(MicroOp **target) {
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#define INC_DEC_LD(r) \
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Program({MicroOp::Increment8, &r}), \
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Program({MicroOp::Decrement8, &r}), \
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Program(FETCH(r, pc_))
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#define INC_INC_DEC_LD(rf, r) \
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Program(WAIT(2), {MicroOp::Increment16, &rf.full}), INC_DEC_LD(r)
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#define DEC_INC_DEC_LD(rf, r) \
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Program(WAIT(2), {MicroOp::Decrement16, &rf.full}), INC_DEC_LD(r)
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static InstructionTable base_program_table = {
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{ {MicroOp::MoveToNextProgram} }, /* 0x00 NOP */
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Program(FETCH16(bc_, pc_)), /* 0x01 LD BC, nn */
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XX, /* 0x02 LD (BC), A */
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Program(WAIT(2), {MicroOp::Increment16, &bc_.full}), /* 0x03 INC BC */
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XX, /* 0x04 INC B */
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XX, /* 0x05 DEC B */
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Program(FETCH(bc_.bytes.high, pc_)), /* 0x06 LD B, n */
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XX, /* 0x07 RLCA */
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XX, /* 0x08 EX AF, AF' */
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ADD16(hl_, bc_), /* 0x09 ADD HL, BC */
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Program(FETCHL(a_, bc_)), /* 0x0a LD A, (BC) */
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Program(WAIT(2), {MicroOp::Decrement16, &bc_.full}), /* 0x0b DEC BC */
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XX, /* 0x0c INC C */
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XX, /* 0x0d DEC C */
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Program(FETCH(bc_.bytes.low, pc_)), /* 0x0e LD C, n */
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XX, /* 0x0f RRCA */
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XX, /* 0x10 DJNZ */
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Program(FETCH16(de_, pc_)), /* 0x11 LD DE, nn */
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XX, /* 0x12 LD (DE), A */
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Program(WAIT(2), {MicroOp::Increment16, &de_.full}), /* 0x13 INC DE */
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XX, /* 0x14 INC D */
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XX, /* 0x15 DEC D */
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Program(FETCH(de_.bytes.high, pc_)), /* 0x16 LD D, n */
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XX, /* 0x17 RLA */
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XX, /* 0x18 JR */
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ADD16(hl_, de_), /* 0x19 ADD HL, DE */
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Program(FETCHL(a_, de_)), /* 0x1a LD A, (DE) */
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Program(WAIT(2), {MicroOp::Decrement16, &de_.full}), /* 0x1b DEC DE */
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XX, /* 0x1c INC E */
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XX, /* 0x1d DEC E */
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Program(FETCH(de_.bytes.low, pc_)), /* 0x1e LD E, n */
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XX, /* 0x1f RRA */
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XX, /* 0x20 JR NZ */
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Program(FETCH16(hl_, pc_)), /* 0x21 LD HL, nn */
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XX, /* 0x22 LD (nn), HL */
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Program(WAIT(2), {MicroOp::Increment16, &hl_.full}), /* 0x23 INC HL */
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XX, /* 0x24 INC H */
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XX, /* 0x25 DEC H */
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Program(FETCH(hl_.bytes.high, pc_)), /* 0x26 LD H, n */
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XX, /* 0x27 DAA */
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XX, /* 0x28 JR Z */
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ADD16(hl_, hl_), /* 0x29 ADD HL, HL */
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Program(FETCH16(address_, pc_), FETCH16L(hl_, address_)), /* 0x2a LD HL, (nn) */
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Program(WAIT(2), {MicroOp::Decrement16, &hl_.full}), /* 0x2b DEC HL */
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XX, /* 0x2c INC L */
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XX, /* 0x2d DEC L */
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Program(FETCH(hl_.bytes.low, pc_)), /* 0x2e LD L, n */
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XX, /* 0x2f CPL */
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XX, /* 0x30 JR NC */
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Program(FETCH16(sp_, pc_)), /* 0x31 LD SP, nn */
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Program(FETCH16(address_, pc_), STOREL(a_, address_)), /* 0x32 LD (nn), A */
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Program(WAIT(2), {MicroOp::Increment16, &sp_.full}), /* 0x33 INC SP */
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XX, /* 0x34 INC (HL) */
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XX, /* 0x35 DEC (HL) */
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Program(FETCH(temporary_.bytes.low, pc_), STOREL(temporary_.bytes.low, hl_)), /* 0x36 LD (HL), n */
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XX, /* 0x37 SCF */
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XX, /* 0x38 JR C */
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ADD16(hl_, sp_), /* 0x39 ADD HL, SP */
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XX, /* 0x3a LD A, (nn) */
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Program(WAIT(2), {MicroOp::Decrement16, &sp_.full}), /* 0x3b DEC SP */
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XX, /* 0x3c INC A */
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XX, /* 0x3d DEC A */
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XX, /* 0x3e LD A, n */
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XX, /* 0x3f CCF */
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LD_GROUP(bc_.bytes.high), /* 0x40 LD B, B; 0x41 LD B, C; 0x42 LD B, D; 0x43 LD B, E; 0x44 LD B, H; 0x45 LD B, L; 0x46 LD B, (HL); 0x47 LD B, A */
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LD_GROUP(bc_.bytes.low), /* 0x48 LD C, B; 0x49 LD C, C; 0x4a LD C, D; 0x4b LD C, E; 0x4c LD C, H; 0x4d LD C, L; 0x4e LD C, (HL); 0x4f LD C, A */
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LD_GROUP(de_.bytes.high), /* 0x50 LD D, B; 0x51 LD D, C; 0x52 LD D, D; 0x53 LD D, E; 0x54 LD D, H; 0x55 LD D, L; 0x56 LD D, (HL); 0x57 LD D, A */
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LD_GROUP(de_.bytes.low), /* 0x58 LD E, B; 0x59 LD E, C; 0x5a LD E, D; 0x5b LD E, E; 0x5c LD E, H; 0x5d LD E, L; 0x5e LD E, (HL); 0x5f LD E, A */
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LD_GROUP(hl_.bytes.high), /* 0x60 LD H, B; 0x61 LD H, C; 0x62 LD H, D; 0x63 LD H, E; 0x64 LD H, H; 0x65 LD H, L; 0x66 LD H, (HL); 0x67 LD H, A */
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LD_GROUP(hl_.bytes.low), /* 0x68 LD L, B; 0x69 LD L, C; 0x6a LD L, D; 0x6b LD L, E; 0x6c LD L, H; 0x6d LD H, L; 0x6e LD L, (HL); 0x6f LD L, A */
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/* 0x00 NOP */ { {MicroOp::MoveToNextProgram} }, /* 0x01 LD BC, nn */ Program(FETCH16(bc_, pc_)),
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/* 0x02 LD (BC), A */ Program(STOREL(a_, bc_)),
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/* 0x03 INC BC; 0x04 INC B; 0x05 DEC B; 0x06 LD B, n */
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INC_INC_DEC_LD(bc_, bc_.bytes.high),
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/* 0x07 RLCA */ Program({MicroOp::RLCA}),
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/* 0x08 EX AF, AF' */ XX, /* 0x09 ADD HL, BC */ ADD16(hl_, bc_),
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/* 0x0a LD A, (BC) */ Program(FETCHL(a_, bc_)),
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/* 0x0b DEC BC; 0x0c INC C; 0x0d DEC C; 0x0e LD C, n */
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DEC_INC_DEC_LD(bc_, bc_.bytes.low),
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/* 0x0f RRCA */ XX,
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/* 0x10 DJNZ */ XX, /* 0x11 LD DE, nn */ Program(FETCH16(de_, pc_)),
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/* 0x12 LD (DE), A */ Program(STOREL(a_, de_)),
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/* 0x13 INC DE; 0x14 INC D; 0x15 DEC D; 0x16 LD D, n */
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INC_INC_DEC_LD(de_, de_.bytes.high),
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/* 0x17 RLA */ Program({MicroOp::RLA}),
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/* 0x18 JR */ XX, /* 0x19 ADD HL, DE */ ADD16(hl_, de_),
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/* 0x1a LD A, (DE) */ Program(FETCHL(a_, de_)),
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/* 0x1b DEC DE; 0x1c INC E; 0x1d DEC E; 0x1e LD E, n */
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DEC_INC_DEC_LD(de_, de_.bytes.low),
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/* 0x1f RRA */ XX,
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/* 0x20 JR NZ */ XX, /* 0x21 LD HL, nn */ Program(FETCH16(hl_, pc_)),
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/* 0x22 LD (nn), HL */ XX,
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/* 0x23 INC HL; 0x24 INC H; 0x25 DEC H; 0x26 LD H, n */
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INC_INC_DEC_LD(hl_, hl_.bytes.high),
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/* 0x27 DAA */ XX,
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/* 0x28 JR Z */ XX, /* 0x29 ADD HL, HL */ ADD16(hl_, hl_),
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/* 0x2a LD HL, (nn) */ Program(FETCH16(temp16_, pc_), FETCH16L(hl_, temp16_)),
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/* 0x2b DEC HL; 0x2c INC L; 0x2d DEC L; 0x2e LD L, n */
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DEC_INC_DEC_LD(hl_, hl_.bytes.low),
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/* 0x2f CPL */ XX,
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/* 0x30 JR NC */ XX, /* 0x31 LD SP, nn */ Program(FETCH16(sp_, pc_)),
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/* 0x32 LD (nn), A */ Program(FETCH16(temp16_, pc_), STOREL(a_, temp16_)),
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/* 0x33 INC SP */ Program(WAIT(2), {MicroOp::Increment16, &sp_.full}),
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/* 0x34 INC (HL) */ XX,
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/* 0x35 DEC (HL) */ XX,
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/* 0x36 LD (HL), n */ Program(FETCH(temp8_, pc_), STOREL(temp8_, hl_)),
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/* 0x37 SCF */ XX,
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/* 0x38 JR C */ XX,
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/* 0x39 ADD HL, SP */ ADD16(hl_, sp_),
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/* 0x3a LD A, (nn) */ XX,
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/* 0x3b DEC SP */ Program(WAIT(2), {MicroOp::Decrement16, &sp_.full}),
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/* 0x3c INC A; 0x3d DEC A; 0x3e LD A, n */
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INC_DEC_LD(a_),
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/* 0x3f CCF */ XX,
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/* 0x40 LD B, B; 0x41 LD B, C; 0x42 LD B, D; 0x43 LD B, E; 0x44 LD B, H; 0x45 LD B, L; 0x46 LD B, (HL); 0x47 LD B, A */
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LD_GROUP(bc_.bytes.high),
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/* 0x48 LD C, B; 0x49 LD C, C; 0x4a LD C, D; 0x4b LD C, E; 0x4c LD C, H; 0x4d LD C, L; 0x4e LD C, (HL); 0x4f LD C, A */
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LD_GROUP(bc_.bytes.low),
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/* 0x50 LD D, B; 0x51 LD D, C; 0x52 LD D, D; 0x53 LD D, E; 0x54 LD D, H; 0x55 LD D, L; 0x56 LD D, (HL); 0x57 LD D, A */
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LD_GROUP(de_.bytes.high),
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/* 0x58 LD E, B; 0x59 LD E, C; 0x5a LD E, D; 0x5b LD E, E; 0x5c LD E, H; 0x5d LD E, L; 0x5e LD E, (HL); 0x5f LD E, A */
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LD_GROUP(de_.bytes.low),
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/* 0x60 LD H, B; 0x61 LD H, C; 0x62 LD H, D; 0x63 LD H, E; 0x64 LD H, H; 0x65 LD H, L; 0x66 LD H, (HL); 0x67 LD H, A */
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LD_GROUP(hl_.bytes.high),
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/* 0x68 LD L, B; 0x69 LD L, C; 0x6a LD L, D; 0x6b LD L, E; 0x6c LD L, H; 0x6d LD H, L; 0x6e LD L, (HL); 0x6f LD L, A */
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LD_GROUP(hl_.bytes.low),
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XX, XX, XX, XX, XX, XX, XX, XX, // 0x70
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LD_GROUP(a_), /* 0x78 LD A, B; 0x79 LD A, C; 0x7a LD A, D; 0x7b LD A, E; 0x7c LD A, H; 0x7d LD A, L; 0x7e LD A, (HL); 0x7f LD A, A */
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XX, XX, XX, XX, XX, XX, XX, XX, // 0x80
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@ -302,7 +327,7 @@ template <class T> class Processor: public MicroOpScheduler<MicroOp> {
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XX, /* 0xc0 RET NZ */
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Program(POP(bc_)), /* 0xc1 POP BC */
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JP(TestNZ), /* 0xc2 JP NZ */
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Program(FETCH16L(address_, pc_), {MicroOp::Move16, &address_.full, &pc_.full}), /* 0xc3 JP nn */
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Program(FETCH16L(temp16_, pc_), {MicroOp::Move16, &temp16_.full, &pc_.full}), /* 0xc3 JP nn */
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XX, /* 0xc4 CALL NZ */
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Program(WAIT(1), PUSH(bc_)), /* 0xc5 PUSH BC */
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XX, /* 0xc6 ADD A, n */
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@ -312,7 +337,7 @@ template <class T> class Processor: public MicroOpScheduler<MicroOp> {
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JP(TestZ), /* 0xca JP Z */
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XX, /* 0xcb [CB page] */
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XX, /* 0xcc CALL Z */
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Program(FETCH16(address_, pc_), WAIT(1), PUSH(pc_), {MicroOp::Move16, &address_.full, &pc_.full}), /* 0xcd CALL */
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Program(FETCH16(temp16_, pc_), WAIT(1), PUSH(pc_), {MicroOp::Move16, &temp16_.full, &pc_.full}), /* 0xcd CALL */
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XX, /* 0xce ADC A, n */
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XX, /* 0xcf RST 08h */
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XX, /* 0xd0 RET NC */
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@ -348,11 +373,11 @@ template <class T> class Processor: public MicroOpScheduler<MicroOp> {
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XX, /* 0xee XOR n */
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XX, /* 0xef RST 28h */
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XX, /* 0xf0 RET p */
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Program(POP(temporary_), {MicroOp::DisassembleAF}), /* 0xf1 POP AF */
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Program(POP(temp16_), {MicroOp::DisassembleAF}), /* 0xf1 POP AF */
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JP(TestP), /* 0xf2 JP P */
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XX, /* 0xf3 DI */
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XX, /* 0xf4 CALL P */
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Program(WAIT(1), {MicroOp::AssembleAF}, PUSH(temporary_)), /* 0xf5 PUSH AF */
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Program(WAIT(1), {MicroOp::AssembleAF}, PUSH(temp16_)), /* 0xf5 PUSH AF */
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XX, /* 0xf6 OR n */
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XX, /* 0xf7 RST 30h */
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XX, /* 0xf8 RET M */
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@ -431,14 +456,50 @@ template <class T> class Processor: public MicroOpScheduler<MicroOp> {
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case MicroOp::Move16: *(uint16_t *)operation->destination = *(uint16_t *)operation->source; break;
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case MicroOp::AssembleAF:
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temporary_.bytes.high = a_;
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temporary_.bytes.low = get_flags();
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temp16_.bytes.high = a_;
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temp16_.bytes.low = get_flags();
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break;
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case MicroOp::DisassembleAF:
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a_ = temporary_.bytes.high;
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set_flags(temporary_.bytes.low);
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a_ = temp16_.bytes.high;
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set_flags(temp16_.bytes.low);
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break;
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case MicroOp::Increment8: {
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uint8_t value = *(uint8_t *)operation->source;
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int result = value + 1;
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// with an increment, overflow occurs if the sign changes from
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// positive to negative
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int overflow = (value ^ result) & ~value;
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int half_result = (value&0xf) + 1;
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*(uint8_t *)operation->source = (uint8_t)result;
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// sign, zero and 5 & 3 are set directly from the result
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bit5_result_ = bit3_result_ = sign_result_ = zero_result_ = (uint8_t)result;
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half_carry_flag_ = half_result & Flag::HalfCarry;
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parity_overflow_flag_ = (overflow >> 5)&Flag::Overflow;
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subtract_flag_ = 0;
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} break;
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case MicroOp::Decrement8: {
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uint8_t value = *(uint8_t *)operation->source;
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int result = value - 1;
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// with an increment, overflow occurs if the sign changes from
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// positive to negative
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int overflow = (value ^ result) & ~value;
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int half_result = (value&0xf) - 1;
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*(uint8_t *)operation->source = (uint8_t)result;
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// sign, zero and 5 & 3 are set directly from the result
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bit5_result_ = bit3_result_ = sign_result_ = zero_result_ = (uint8_t)result;
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half_carry_flag_ = half_result & Flag::HalfCarry;
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parity_overflow_flag_ = (overflow >> 5)&Flag::Overflow;
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subtract_flag_ = Flag::Subtract;
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} break;
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#define set_parity(v) \
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parity_overflow_flag_ = v^1;\
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parity_overflow_flag_ ^= parity_overflow_flag_ >> 4;\
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@ -503,7 +564,7 @@ template <class T> class Processor: public MicroOpScheduler<MicroOp> {
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de_.full++;
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hl_.full++;
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bit3_result_ = bit5_result_ = a_ + temporary_.bytes.low;
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bit3_result_ = bit5_result_ = a_ + temp8_;
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||||
subtract_flag_ = 0;
|
||||
half_carry_flag_ = 0;
|
||||
|
||||
@ -517,6 +578,22 @@ template <class T> class Processor: public MicroOpScheduler<MicroOp> {
|
||||
}
|
||||
} break;
|
||||
|
||||
case MicroOp::RLA: {
|
||||
uint8_t new_carry = a_ >> 7;
|
||||
a_ = (uint8_t)((a_ << 1) | carry_flag_);
|
||||
bit3_result_ = bit5_result_ = a_;
|
||||
carry_flag_ = new_carry;
|
||||
subtract_flag_ = half_carry_flag_ = 0;
|
||||
} break;
|
||||
|
||||
case MicroOp::RLCA: {
|
||||
uint8_t new_carry = a_ >> 7;
|
||||
a_ = (uint8_t)((a_ << 1) | new_carry);
|
||||
bit3_result_ = bit5_result_ = a_;
|
||||
carry_flag_ = new_carry;
|
||||
subtract_flag_ = half_carry_flag_ = 0;
|
||||
} break;
|
||||
|
||||
case MicroOp::SetInstructionPage:
|
||||
schedule_program(fetch_decode_execute);
|
||||
current_instruction_page_ = (CPU::Z80::MicroOp **)operation->source;
|
||||
|
||||
Loading…
Reference in New Issue
Block a user