mirror of
https://github.com/TomHarte/CLK.git
synced 2026-04-20 10:17:05 +00:00
Merge pull request #1716 from TomHarte/6809
Eliminate need for intermediate storage in acquiring 6809 decodings.
This commit is contained in:
Thomas Harte
GitHub
@@ -71,11 +71,12 @@ enum class Page {
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defined by opcode @c i on page @c page.
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*/
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template <Page page> struct OperationMapper {
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template <int i, typename SchedulerT> void dispatch(SchedulerT &scheduler);
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template <int i, typename SchedulerT> auto dispatch(SchedulerT &scheduler);
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};
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template <>
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template <int i, typename SchedulerT> void OperationMapper<Page::Page0>::dispatch(SchedulerT &s) {
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template <int i, typename SchedulerT>
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auto OperationMapper<Page::Page0>::dispatch(SchedulerT &s) {
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using AM = AddressingMode;
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using O = Operation;
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@@ -101,15 +102,15 @@ template <int i, typename SchedulerT> void OperationMapper<Page::Page0>::dispatc
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AM::Illegal, AM::Inherent, AM::Immediate, AM::Illegal,
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AM::Immediate, AM::Inherent, AM::Inherent, AM::Inherent,
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};
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s.template schedule<operations[lower], modes[lower]>();
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} break;
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return s.template schedule<operations[lower], modes[lower]>();
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}
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case 0x2: {
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static constexpr Operation operations[] = {
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O::BRA, O::BRN, O::BHI, O::BLS, O::BCC, O::BCS, O::BNE, O::BEQ,
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O::BVC, O::BVS, O::BPL, O::BMI, O::BGE, O::BLT, O::BGT, O::BLE,
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};
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s.template schedule<operations[lower], AM::Relative>();
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} break;
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return s.template schedule<operations[lower], AM::Relative>();
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}
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case 0x3: {
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static constexpr Operation operations[] = {
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O::LEAX, O::LEAY, O::LEAS, O::LEAU, O::PSHS, O::PULS, O::PSHU, O::PULU,
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@@ -118,63 +119,64 @@ template <int i, typename SchedulerT> void OperationMapper<Page::Page0>::dispatc
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static constexpr auto op = operations[lower];
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switch(lower) {
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case 0x0: case 0x1: case 0x2: case 0x3:
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s.template schedule<op, AM::Indexed>();
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break;
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return s.template schedule<op, AM::Indexed>();
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case 0x4: case 0x5: case 0x6: case 0x7: case 0xc:
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s.template schedule<op, AM::Immediate>();
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break;
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return s.template schedule<op, AM::Immediate>();
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case 0x8:
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s.template schedule<op, AM::Illegal>();
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break;
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return s.template schedule<op, AM::Illegal>();
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default:
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s.template schedule<op, AM::Inherent>();
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break;
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return s.template schedule<op, AM::Inherent>();
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}
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} break;
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}
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case 0x4: {
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static constexpr Operation operations[] = {
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O::NEGA, O::None, O::None, O::COMA, O::LSRA, O::None, O::RORA, O::ASRA,
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O::LSLA, O::ROLA, O::DECA, O::None, O::INCA, O::TSTA, O::None, O::CLRA,
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};
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static constexpr auto op = operations[lower];
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s.template schedule<op, op == O::None ? AM::Illegal : AM::Inherent>();
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} break;
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return s.template schedule<op, op == O::None ? AM::Illegal : AM::Inherent>();
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}
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case 0x5: {
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static constexpr Operation operations[] = {
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O::NEGB, O::None, O::None, O::COMB, O::LSRB, O::None, O::RORB, O::ASRB,
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O::LSLB, O::ROLB, O::DECB, O::None, O::INCB, O::TSTB, O::None, O::CLRB,
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};
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static constexpr auto op = operations[lower];
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s.template schedule<op, op == O::None ? AM::Illegal : AM::Inherent>();
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} break;
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return s.template schedule<op, op == O::None ? AM::Illegal : AM::Inherent>();
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}
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case 0x0: case 0x6: case 0x7: {
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static constexpr Operation operations[] = {
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O::NEG, O::None, O::None, O::COM, O::LSR, O::None, O::ROR, O::ASR,
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O::LSL, O::ROL, O::DEC, O::None, O::INC, O::TST, O::JMP, O::CLR,
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};
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static constexpr auto op = operations[lower];
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s.template schedule<op, op == O::None ? AM::Illegal : upper == 0 ? AM::Direct : mode>();
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} break;
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return s.template schedule<op, op == O::None ? AM::Illegal : upper == 0 ? AM::Direct : mode>();
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}
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case 0x8: case 0x9: case 0xa: case 0xb: {
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static constexpr Operation operations[] = {
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O::SUBA, O::CMPA, O::SBCA, O::SUBD, O::ANDA, O::BITA, O::LDA, O::STA,
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O::EORA, O::ADCA, O::ORA, O::ADDA, O::CMPX, O::JSR, O::LDX, O::STX,
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};
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if(i == 0x8d) s.template schedule<O::BSR, AM::Relative>();
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else s.template schedule<operations[lower], mode>();
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} break;
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if(i == 0x8d) return s.template schedule<O::BSR, AM::Relative>();
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else return s.template schedule<operations[lower], mode>();
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}
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case 0xc: case 0xd: case 0xe: case 0xf: {
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static constexpr Operation operations[] = {
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O::SUBB, O::CMPB, O::SBCB, O::ADDD, O::ANDB, O::BITB, O::LDB, O::STB,
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O::EORB, O::ADCB, O::ORB, O::ADDB, O::LDD, O::STD, O::LDU, O::STU,
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};
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s.template schedule<operations[lower], mode>();
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} break;
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return s.template schedule<operations[lower], mode>();
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}
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}
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__builtin_unreachable();
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}
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template <>
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template <int i, typename SchedulerT> void OperationMapper<Page::Page1>::dispatch(SchedulerT &s) {
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template <int i, typename SchedulerT>
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auto OperationMapper<Page::Page1>::dispatch(SchedulerT &s) {
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using AM = AddressingMode;
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using O = Operation;
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@@ -188,34 +190,35 @@ template <int i, typename SchedulerT> void OperationMapper<Page::Page1>::dispatc
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O::LBRN, O::LBHI, O::LBLS, O::LBCC, O::LBCS, O::LBNE, O::LBEQ,
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O::LBVC, O::LBVS, O::LBPL, O::LBMI, O::LBGE, O::LBLT, O::LBGT, O::LBLE,
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};
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s.template schedule<operations[i - 0x21], AM::Relative>();
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return s.template schedule<operations[i - 0x21], AM::Relative>();
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} else switch(i) {
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default: s.template schedule<O::None, AM::Illegal>(); break;
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case 0x3f: s.template schedule<O::SWI2, AM::Inherent>(); break;
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default: return s.template schedule<O::None, AM::Illegal>();
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case 0x3f: return s.template schedule<O::SWI2, AM::Inherent>();
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case 0x83: case 0x93: case 0xa3: case 0xb3:
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s.template schedule<O::CMPD, mode>();
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break;
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return s.template schedule<O::CMPD, mode>();
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case 0x8c: case 0x9c: case 0xac: case 0xbc:
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s.template schedule<O::CMPY, mode>();
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break;
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return s.template schedule<O::CMPY, mode>();
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case 0x8e: case 0x9e: case 0xae: case 0xbe:
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s.template schedule<O::LDY, mode>();
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break;
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return s.template schedule<O::LDY, mode>();
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case 0x9f: case 0xaf: case 0xbf:
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s.template schedule<O::STY, mode>();
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break;
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return s.template schedule<O::STY, mode>();
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case 0xce: case 0xde: case 0xee: case 0xfe:
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s.template schedule<O::LDS, mode>();
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break;
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return s.template schedule<O::LDS, mode>();
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case 0xdf: case 0xef: case 0xff:
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s.template schedule<O::STS, mode>();
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break;
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return s.template schedule<O::STS, mode>();
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}
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__builtin_unreachable();
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}
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template <>
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template <int i, typename SchedulerT> void OperationMapper<Page::Page2>::dispatch(SchedulerT &s) {
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template <int i, typename SchedulerT>
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auto OperationMapper<Page::Page2>::dispatch(SchedulerT &s) {
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using AM = AddressingMode;
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using O = Operation;
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@@ -225,16 +228,16 @@ template <int i, typename SchedulerT> void OperationMapper<Page::Page2>::dispatc
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static constexpr auto mode = modes[(i >> 4) & 3];
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switch(i) {
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default: s.template schedule<O::None, AM::Illegal>(); break;
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case 0x3f: s.template schedule<O::SWI3, AM::Inherent>(); break;
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default: return s.template schedule<O::None, AM::Illegal>();
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case 0x3f: return s.template schedule<O::SWI3, AM::Inherent>();
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case 0x83: case 0x93: case 0xa3: case 0xb3:
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s.template schedule<O::CMPU, mode>();
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break;
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return s.template schedule<O::CMPU, mode>();
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case 0x8c: case 0x9c: case 0xac: case 0xbc:
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s.template schedule<O::CMPS, mode>();
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break;
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return s.template schedule<O::CMPS, mode>();
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}
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__builtin_unreachable();
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}
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}
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@@ -757,7 +757,6 @@
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4B96DECC2EBEE7D100505298 /* SID.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 4B96DECA2EBEE7D100505298 /* SID.cpp */; };
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4B96DECD2EBEE7D100505298 /* SID.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 4B96DECA2EBEE7D100505298 /* SID.cpp */; };
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4B96DECE2EBEE7D100505298 /* SID.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 4B96DECA2EBEE7D100505298 /* SID.cpp */; };
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4B96DED32EC3ECDA00505298 /* SIDTests.mm in Sources */ = {isa = PBXBuildFile; fileRef = 4B96DED22EC3ECDA00505298 /* SIDTests.mm */; };
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4B96F7CE263E33B10092AEE1 /* DSK.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 4B96F7CC263E33B10092AEE1 /* DSK.cpp */; };
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4B96F7CF263E33B10092AEE1 /* DSK.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 4B96F7CC263E33B10092AEE1 /* DSK.cpp */; };
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4B98A05E1FFAD3F600ADF63B /* CSROMFetcher.mm in Sources */ = {isa = PBXBuildFile; fileRef = 4B98A05D1FFAD3F600ADF63B /* CSROMFetcher.mm */; };
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@@ -1980,7 +1979,6 @@
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4B96DEC32EBEA88C00505298 /* TubeProcessor.hpp */ = {isa = PBXFileReference; lastKnownFileType = sourcecode.cpp.h; path = TubeProcessor.hpp; sourceTree = "<group>"; };
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4B96DEC92EBEE7D100505298 /* SID.hpp */ = {isa = PBXFileReference; lastKnownFileType = sourcecode.cpp.h; path = SID.hpp; sourceTree = "<group>"; };
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4B96DECA2EBEE7D100505298 /* SID.cpp */ = {isa = PBXFileReference; lastKnownFileType = sourcecode.cpp.cpp; path = SID.cpp; sourceTree = "<group>"; };
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4B96DED22EC3ECDA00505298 /* SIDTests.mm */ = {isa = PBXFileReference; lastKnownFileType = sourcecode.cpp.objcpp; path = SIDTests.mm; sourceTree = "<group>"; };
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4B96DED42EC53BC300505298 /* BiquadFilter.hpp */ = {isa = PBXFileReference; lastKnownFileType = sourcecode.cpp.h; path = BiquadFilter.hpp; sourceTree = "<group>"; };
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4B96F7CB263E30B00092AEE1 /* RawSectorDump.hpp */ = {isa = PBXFileReference; lastKnownFileType = sourcecode.cpp.h; path = RawSectorDump.hpp; sourceTree = "<group>"; };
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4B96F7CC263E33B10092AEE1 /* DSK.cpp */ = {isa = PBXFileReference; lastKnownFileType = sourcecode.cpp.cpp; path = DSK.cpp; sourceTree = "<group>"; };
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@@ -4968,7 +4966,6 @@
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4BD4A8CF1E077FD20020D856 /* PCMTrackTests.mm */,
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4B3F76B825A1635300178AEC /* PowerPCDecoderTests.mm */,
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4BE76CF822641ED300ACD6FA /* QLTests.mm */,
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4B96DED22EC3ECDA00505298 /* SIDTests.mm */,
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4B8DD3672633B2D400B3C866 /* SpectrumVideoContentionTests.mm */,
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4B2AF8681E513FC20027EE29 /* TIATests.mm */,
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4B1D08051E0F7A1100763741 /* TimeTests.mm */,
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@@ -6931,7 +6928,6 @@
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4B778F4623A5F1D80000D260 /* StaticAnalyser.cpp in Sources */,
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4B778F1323A5EC890000D260 /* Z80Base.cpp in Sources */,
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4B778F2923A5EF030000D260 /* CommodoreROM.cpp in Sources */,
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4B96DED32EC3ECDA00505298 /* SIDTests.mm in Sources */,
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4B06AADC2C645F720034D014 /* BD500.cpp in Sources */,
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4B778F4823A5F1E70000D260 /* StaticAnalyser.cpp in Sources */,
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4B92EACA1B7C112B00246143 /* 6502TimingTests.swift in Sources */,
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@@ -17,19 +17,15 @@ using namespace InstructionSet::M6809;
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namespace {
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struct OperationCapture {
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template <Operation operation, AddressingMode mode> void schedule() {
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this->operation = operation;
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this->mode = mode;
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template <Operation operation, AddressingMode mode> auto schedule() {
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return std::make_pair(operation, mode);
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}
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Operation operation;
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AddressingMode mode;
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};
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template <Page page> OperationCapture capture(uint8_t opcode) {
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template <Page page> std::pair<Operation, AddressingMode> capture(const uint8_t opcode) {
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OperationCapture catcher;
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OperationMapper<page> mapper;
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Reflection::dispatch(mapper, opcode, catcher);
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return catcher;
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return Reflection::dispatch(mapper, opcode, catcher);
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}
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}
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@@ -39,17 +35,21 @@ template <Page page> OperationCapture capture(uint8_t opcode) {
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@implementation M6809OperationMapperTests
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- (void)testOpcode:(uint8_t)opcode page:(Page)page isOperation:(Operation)operation addressingMode:(AddressingMode)mode {
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OperationCapture catcher;
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switch(page) {
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case Page::Page0: catcher = capture<Page::Page0>(opcode); break;
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case Page::Page1: catcher = capture<Page::Page1>(opcode); break;
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case Page::Page2: catcher = capture<Page::Page2>(opcode); break;
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}
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XCTAssertEqual(catcher.operation, operation, "Operation didn't match for opcode 0x%02x in page %d", opcode, int(page));
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XCTAssertEqual(catcher.mode, mode, "Mode didn't match for opcode 0x%02x in page %d", opcode, int(page));
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- (void)
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testOpcode:(uint8_t)opcode
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page:(Page)page
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isOperation:(Operation)expectedOperation
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addressingMode:(AddressingMode)expectedMode
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{
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const auto &[operation, mode] = [&]() {
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switch(page) {
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case Page::Page0: return capture<Page::Page0>(opcode);
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case Page::Page1: return capture<Page::Page1>(opcode);
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case Page::Page2: return capture<Page::Page2>(opcode);
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}
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} ();
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XCTAssertEqual(expectedOperation, operation, "Operation didn't match for opcode 0x%02x in page %d", opcode, int(page));
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XCTAssertEqual(expectedMode, mode, "Mode didn't match for opcode 0x%02x in page %d", opcode, int(page));
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}
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- (void)testMap {
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@@ -16,8 +16,9 @@ namespace Reflection {
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/*!
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Calls @c t.dispatch<c>(args...) as efficiently as possible.
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*/
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template <typename TargetT, typename... Args> void dispatch(TargetT &t, uint8_t c, Args &&... args) {
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#define Opt(x) case x: t.template dispatch<x>(std::forward<Args>(args)...); break
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template <typename TargetT, typename... Args>
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auto dispatch(TargetT &t, const uint8_t c, Args &&... args) {
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#define Opt(x) case x: return t.template dispatch<x>(std::forward<Args>(args)...);
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#define Opt4(x) Opt(x + 0x00); Opt(x + 0x01); Opt(x + 0x02); Opt(x + 0x03)
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#define Opt16(x) Opt4(x + 0x00); Opt4(x + 0x04); Opt4(x + 0x08); Opt4(x + 0x0c)
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#define Opt64(x) Opt16(x + 0x00); Opt16(x + 0x10); Opt16(x + 0x20); Opt16(x + 0x30)
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@@ -26,6 +27,7 @@ template <typename TargetT, typename... Args> void dispatch(TargetT &t, uint8_t
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switch(c) {
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Opt256(0);
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}
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__builtin_unreachable();
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#undef Opt256
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#undef Opt64
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@@ -68,20 +70,21 @@ struct RangeDispatcher {
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/// Perform @c target.perform<n>() for the input range `begin <= n < end`.
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template <typename... Args>
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static void dispatch(SequencerT &target, int begin, int end, Args&&... args) {
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static auto dispatch(SequencerT &target, const int begin, const int end, Args&&... args) {
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// Minor optimisation: do a comparison with end once outside the loop and if it implies so
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// then do no further comparisons within the loop. This is somewhat targetted at expected
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// use cases.
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if(end < SequencerT::max) {
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dispatch<true>(target, begin, end, args...);
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return dispatch<true>(target, begin, end, args...);
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} else {
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dispatch<false>(target, begin, end, args...);
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return dispatch<false>(target, begin, end, args...);
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}
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}
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private:
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template <bool use_end, typename... Args> static void dispatch(SequencerT &target, int begin, int end, Args&&... args) {
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template <bool use_end, typename... Args>
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static auto dispatch(SequencerT &target, const int begin, const int end, Args&&... args) {
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#define index(n) \
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case n: \
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if constexpr (n <= SequencerT::max) { \
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@@ -141,13 +144,13 @@ struct SubrangeDispatcher {
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}
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private:
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static constexpr int find_begin(int n) {
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static consteval int find_begin(int n) {
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const auto type = ClassifierT::region(n);
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while(n && ClassifierT::region(n - 1) == type) --n;
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return n;
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}
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static constexpr int find_end(int n) {
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static consteval int find_end(int n) {
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const auto type = ClassifierT::region(n);
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while(n < ClassifierT::max && ClassifierT::region(n) == type) ++n;
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return n;
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