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Adds decoding of IWM accesses and respect for the ROM overlay bit.
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@ -30,7 +30,8 @@ class ConcreteMachine:
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ConcreteMachine(const ROMMachine::ROMFetcher &rom_fetcher) :
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mc68000_(*this),
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video_(ram_.data()),
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via_(via_port_handler_) {
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via_(via_port_handler_),
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via_port_handler_(*this) {
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// Grab a copy of the ROM and convert it into big-endian data.
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const auto roms = rom_fetcher("Macintosh", { "mac128k.rom" });
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@ -76,18 +77,26 @@ class ConcreteMachine:
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if(cycle.data_select_active()) {
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printf("IO access to %06x: ", word_address << 1);
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// VIA accesses are via address 0xefe1fe + register*512,
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// which at word precision is 0x77f0ff + register*256.
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if((word_address & 0x77f0ff) == 0x77f0ff) {
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printf("VIA access ");
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if(cycle.operation & Microcycle::Read) {
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cycle.value->halves.low = via_.get_register(word_address >> 8);
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if(cycle.operation & Microcycle::SelectWord) cycle.value->halves.high = 0xff;
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} else {
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via_.set_register(word_address >> 8, cycle.value->halves.low);
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}
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switch(word_address & 0x7ff0ff) {
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case 0x77f0ff:
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// VIA accesses are via address 0xefe1fe + register*512,
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// which at word precision is 0x77f0ff + register*256.
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printf("VIA");
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if(cycle.operation & Microcycle::Read) {
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cycle.value->halves.low = via_.get_register(word_address >> 8);
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if(cycle.operation & Microcycle::SelectWord) cycle.value->halves.high = 0xff;
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} else {
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via_.set_register(word_address >> 8, cycle.value->halves.low);
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}
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break;
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case 0x6ff0ff:
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// IWM
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printf("IWM");
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break;
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}
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printf("\n");
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}
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} else {
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@ -163,32 +172,52 @@ class ConcreteMachine:
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synchronous bus.
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*/
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void set_rom_is_overlay(bool rom_is_overlay) {
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ROM_is_overlay_ = rom_is_overlay;
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}
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private:
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struct VIAPortHandler: public MOS::MOS6522::PortHandler {
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void set_port_output(MOS::MOS6522::Port port, uint8_t value, uint8_t direction_mask) {
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/*
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Port A:
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b7: [input] SCC wait/request (/W/REQA and /W/REQB wired together for a logical OR)
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b6: 0 = alternate screen buffer, 1 = main screen buffer
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b5: floppy disk SEL state control (upper/lower head "among other things")
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b4: 1 = use ROM overlay memory map, 0 = use ordinary memory map
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b3: 0 = use alternate sound buffer, 1 = use ordinary sound buffer
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b2–b0: audio output volume
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class VIAPortHandler: public MOS::MOS6522::PortHandler {
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public:
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VIAPortHandler(ConcreteMachine &machine) : machine_(machine) {}
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Port B:
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b7: 0 = sound enabled, 1 = sound disabled
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b6: [input] 0 = video beam in visible portion of line, 1 = outside
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b5: [input] mouse y2
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b4: [input] mouse x2
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b3: [input] 0 = mouse button down, 1 = up
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b2: 0 = real-time clock enabled, 1 = disabled
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b1: clock's data-clock line
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b0: clock's serial data line
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void set_port_output(MOS::MOS6522::Port port, uint8_t value, uint8_t direction_mask) {
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/*
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Peripheral lines: keyboard data, interrupt configuration.
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(See p176 [/215])
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*/
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switch(port) {
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case MOS::MOS6522::Port::A:
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/*
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Port A:
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b7: [input] SCC wait/request (/W/REQA and /W/REQB wired together for a logical OR)
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b6: 0 = alternate screen buffer, 1 = main screen buffer
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b5: floppy disk SEL state control (upper/lower head "among other things")
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b4: 1 = use ROM overlay memory map, 0 = use ordinary memory map
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b3: 0 = use alternate sound buffer, 1 = use ordinary sound buffer
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b2–b0: audio output volume
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*/
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machine_.set_rom_is_overlay(!!(value & 0x10));
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break;
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Peripheral lines: keyboard data, interrupt configuration.
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(See p176 [/215])
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*/
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}
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case MOS::MOS6522::Port::B:
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/*
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Port B:
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b7: 0 = sound enabled, 1 = sound disabled
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b6: [input] 0 = video beam in visible portion of line, 1 = outside
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b5: [input] mouse y2
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b4: [input] mouse x2
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b3: [input] 0 = mouse button down, 1 = up
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b2: 0 = real-time clock enabled, 1 = disabled
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b1: clock's data-clock line
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b0: clock's serial data line
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*/
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break;
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}
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}
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private:
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ConcreteMachine &machine_;
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};
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