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Corrects return address of JSR (An).
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@@ -75,7 +75,7 @@ template <class T, bool dtack_is_implicit> void Processor<T, dtack_is_implicit>:
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std::cerr << "68000 Abilities exhausted; can't manage instruction " << std::hex << decoded_instruction_ << " from " << (program_counter_.full - 4) << std::endl;
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std::cerr << "68000 Abilities exhausted; can't manage instruction " << std::hex << decoded_instruction_ << " from " << (program_counter_.full - 4) << std::endl;
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return;
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return;
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} else {
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} else {
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// if(0x4f7a == program_counter_.full - 4)return;
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// if(0x4f7a == program_counter_.full - 4) return;
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// std::cout << std::hex << (program_counter_.full - 4) << ": " << std::setw(4) << decoded_instruction_ << '\t';
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// std::cout << std::hex << (program_counter_.full - 4) << ": " << std::setw(4) << decoded_instruction_ << '\t';
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}
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}
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@@ -1152,11 +1152,19 @@ template <class T, bool dtack_is_implicit> void Processor<T, dtack_is_implicit>:
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}
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}
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} break;
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} break;
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case int(MicroOp::Action::PrepareJSR):
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case int(MicroOp::Action::PrepareJSR): {
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const auto mode = (decoded_instruction_ >> 3) & 7;
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// Determine the proper resumption address.
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switch(mode) {
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case 2: destination_bus_data_[0].full = program_counter_.full - 2; break; /* (An) */
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default:
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destination_bus_data_[0].full = program_counter_.full; /* Everything other than (An) */
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break;
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}
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destination_bus_data_[0].full = program_counter_.full;
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destination_bus_data_[0].full = program_counter_.full;
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address_[7].full -= 4;
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address_[7].full -= 4;
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effective_address_[1].full = address_[7].full;
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effective_address_[1].full = address_[7].full;
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break;
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} break;
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case int(MicroOp::Action::PrepareBSR):
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case int(MicroOp::Action::PrepareBSR):
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destination_bus_data_[0].full = (decoded_instruction_ & 0xff) ? program_counter_.full - 2 : program_counter_.full;
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destination_bus_data_[0].full = (decoded_instruction_ & 0xff) ? program_counter_.full - 2 : program_counter_.full;
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