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Merge pull request #723 from TomHarte/LSLTiming

Introduces a timing test for LSL. Which already passes.
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Thomas Harte 2020-01-08 22:43:50 -05:00 committed by GitHub
commit 2c742a051e
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2 changed files with 30 additions and 0 deletions

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@ -261,6 +261,32 @@ class CPU::MC68000::ProcessorStorageTests {
XCTAssertEqual(stack_frame[6], 0x1004);
}
- (void)testShiftDuration {
//
_machine->set_program({
0x7004, // MOVE.l #$4, D0
0x7207, // MOVE.l #$7, D1
0x7401, // MOVE.l #$1, D2
0xe16e, // lsl d0, d6
0xe36e, // lsl d1, d6
0xe56e, // lsl d2, d6
});
_machine->run_for_instructions(3);
_machine->reset_cycle_count();
_machine->run_for_instructions(1);
XCTAssertEqual(_machine->get_cycle_count(), 6 + 8);
_machine->reset_cycle_count();
_machine->run_for_instructions(1);
XCTAssertEqual(_machine->get_cycle_count(), 6 + 14);
_machine->reset_cycle_count();
_machine->run_for_instructions(1);
XCTAssertEqual(_machine->get_cycle_count(), 6 + 2);
}
- (void)testOpcodeCoverage {
// Perform an audit of implemented instructions.
CPU::MC68000::ProcessorStorageTests storage_tests(

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@ -130,6 +130,10 @@ class RAM68000: public CPU::MC68000::BusHandler {
return int(duration_.as_integral()) >> 1;
}
void reset_cycle_count() {
duration_ = HalfCycles(0);
}
private:
CPU::MC68000::Processor<RAM68000, true, true> m68000_;
std::array<uint16_t, 256*1024> ram_{};