Mildly improve logging, define a few more ROMs.

Machines/Acorn/Archimedes/Archimedes.cpp

@@ -108,7 +108,7 @@ class ConcreteMachine:
 		) : executor_(*this, *this) {
 			set_clock_rate(ClockRate);
 
-			constexpr ROM::Name risc_os = ROM::Name::AcornRISCOS311;
+			constexpr ROM::Name risc_os = ROM::Name::AcornRISCOS319;
 			ROM::Request request(risc_os);
 			auto roms = rom_fetcher(request);
 			if(!request.validate(roms)) {
@@ -278,6 +278,9 @@ class ConcreteMachine:
 						break;
 						case 0x0d:
 							swis.back().swi_name = "OS_Find";
+							if(executor_.registers()[0] >= 0x40) {
+								pointer = executor_.registers()[1];
+							}
 						break;
 						case 0x1d:
 							swis.back().swi_name = "OS_Heap";
@@ -309,6 +312,7 @@ class ConcreteMachine:
 						break;
 						case 0x27:
 							swis.back().swi_name = "OS_GSTrans";
+							pointer = executor_.registers()[0];
 						break;
 						case 0x29:
 							swis.back().swi_name = "OS_FSControl";
@@ -342,7 +346,7 @@ class ConcreteMachine:
 							executor_.bus.template read<uint8_t>(pointer, next, InstructionSet::ARM::Mode::Supervisor, false);
 							++pointer;
 
-							if(next == '\0') break;
+							if(next < 32) break;
 							swis.back().value_name.push_back(static_cast<char>(next));
 						}
 					}
@@ -366,13 +370,14 @@ class ConcreteMachine:
 						info.append("%s", back.swi_name.c_str());
 					}
 
+					if(!back.value_name.empty()) {
+						info.append(" %s", back.value_name.c_str());
+					}
+
 					info.append(" @ %08x ", back.address);
 					for(uint32_t c = 0; c < 10; c++) {
 						info.append("r%d:%08x ", c, back.regs[c]);
 					}
-					if(!back.value_name.empty()) {
-						info.append("for %s", back.value_name.c_str());
-					}
 				}
 
 				swis.pop_back();

Machines/Acorn/Archimedes/InputOutputController.hpp

@@ -161,6 +161,7 @@ struct InputOutputController {
 		switch(target.bank) {
 			default:
 				logger.error().append("Unrecognised IOC read from %08x i.e. bank %d / type %d", address, target.bank, target.type);
+				destination = IntT(~0);
 			break;
 
 			// Bank 0: internal registers.

Machines/Acorn/Archimedes/MemoryController.hpp

@@ -45,10 +45,20 @@ struct MemoryController {
 	}
 
 	void set_rom(const std::vector<uint8_t> &rom) {
-		std::copy(
+		if(rom_.size() % rom.size() || rom.size() > rom_.size()) {
-			rom.begin(),
+			// TODO: throw.
-			rom.begin() + static_cast<ptrdiff_t>(std::min(rom.size(), rom_.size())),
+			return;
-			rom_.begin());
+		}
+
+		// Copy in as many times as it'll fit.
+		std::size_t base = 0;
+		while(base < rom_.size()) {
+			std::copy(
+				rom.begin(),
+				rom.end(),
+				rom_.begin() + base);
+			base += rom.size();
+		}
 	}
 
 	template <typename IntT>

Machines/Utility/ROMCatalogue.cpp

@@ -540,6 +540,12 @@ Description::Description(Name name) {
 			*this = Description(name, "Electron", "the Electron MOS ROM v1.00", "os.rom", 16*1024, 0xbf63fb1fu);
 		break;
 
+		case Name::AcornArthur030:
+			*this = Description(name, "Archimedes", "Arthur v0.30", "ROM030", 512*1024, 0x5df8ed42u);
+		break;
+		case Name::AcornRISCOS200:
+			*this = Description(name, "Archimedes", "RISC OS v2.00", "ROM200", 512*1024, 0x89c4ad36u);
+		break;
 		case Name::AcornRISCOS311:
 			*this = Description(name, "Archimedes", "RISC OS v3.11", "ROM311", 2*1024*1024, 0x54c0c963u);
 		break;

Machines/Utility/ROMCatalogue.hpp

@@ -32,6 +32,8 @@ enum Name {
 	Acorn1770DFS,
 
 	// Acorn Archimedes.
+	AcornArthur030,
+	AcornRISCOS200,
 	AcornRISCOS311,
 	AcornRISCOS319,
 

Outputs/Log.hpp

@@ -80,6 +80,7 @@ constexpr bool is_enabled(Source source) {
 		case Source::SCC:
 		case Source::SCSI:
 		case Source::I2C:
+		case Source::Keyboard:
 			return false;
 	}
 }