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Add MULU/S functionality, though not timing.

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This commit is contained in:
Thomas Harte
2022-05-22 08:02:32 -04:00
parent 4a6512f5d5
commit 3c1c4f89e9
2 changed files with 31 additions and 2 deletions
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29
Processors/68000Mk2/Implementation/68000Mk2Implementation.hpp
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@@ -162,6 +162,7 @@ enum ExecutionState: int {
MOVEMtoM_finish, MOVEMtoM_finish,
DIVU_DIVS, DIVU_DIVS,
MULU_MULS,
}; };
// MARK: - The state machine. // MARK: - The state machine.
@@ -697,6 +698,8 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
StdCASE(DIVU, perform_state_ = DIVU_DIVS); StdCASE(DIVU, perform_state_ = DIVU_DIVS);
StdCASE(DIVS, perform_state_ = DIVU_DIVS); StdCASE(DIVS, perform_state_ = DIVU_DIVS);
StdCASE(MULU, perform_state_ = MULU_MULS);
StdCASE(MULS, perform_state_ = MULU_MULS);
default: default:
assert(false); assert(false);
@@ -1854,6 +1857,24 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
Prefetch(); // np Prefetch(); // np
MoveToStateSpecific(Decode); MoveToStateSpecific(Decode);
//
// MULU and MULS
//
BeginState(MULU_MULS):
Prefetch(); // np
// Perform the instruction.
PerformDynamic();
// Delay the correct amount of time.
IdleBus(dynamic_instruction_length_);
// MULU and MULS are always to a register, so just write back here
// to save on dispatch costs.
registers_[instruction_.reg(1)] = operand_[1];
MoveToStateSpecific(Decode);
// //
// Various states TODO. // Various states TODO.
// //
@@ -1951,6 +1972,14 @@ template <bool did_overflow> void ProcessorBase::did_divs(int32_t, int32_t) {
// TODO: calculate cost. // TODO: calculate cost.
} }
template <typename IntT> void ProcessorBase::did_mulu(IntT) {
// TODO: calculate cost.
}
template <typename IntT> void ProcessorBase::did_muls(IntT) {
// TODO: calculate cost.
}
template <bool use_current_instruction_pc> void ProcessorBase::raise_exception(int vector) { template <bool use_current_instruction_pc> void ProcessorBase::raise_exception(int vector) {
// No overt action is taken here; instructions that might throw an exception are required // No overt action is taken here; instructions that might throw an exception are required
// to check-in after the fact. // to check-in after the fact.

4
Processors/68000Mk2/Implementation/68000Mk2Storage.hpp
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@@ -122,8 +122,8 @@ struct ProcessorBase: public InstructionSet::M68k::NullFlowController {
// Flow controller... many TODO. // Flow controller... many TODO.
using Preinstruction = InstructionSet::M68k::Preinstruction; using Preinstruction = InstructionSet::M68k::Preinstruction;
template <typename IntT> void did_mulu(IntT) {} // template <typename IntT> void did_mulu(IntT);
template <typename IntT> void did_muls(IntT) {} // template <typename IntT> void did_muls(IntT);
inline void did_chk(bool, bool); inline void did_chk(bool, bool);
inline void did_scc(bool); inline void did_scc(bool);
inline void did_shift(int) {} // inline void did_shift(int) {} //