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Merge pull request #1309 from TomHarte/TypeWarnings
Resolve minor dangling type conversion warnings.
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commit
3ee81efe40
@ -56,11 +56,11 @@ class Accessor {
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bool overrun_ = false;
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};
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#define x(v) (v >> 6)
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#define y(v) ((v >> 3) & 7)
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#define q(v) ((v >> 3) & 1)
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#define p(v) ((v >> 4) & 3)
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#define z(v) (v & 7)
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constexpr uint8_t x(uint8_t v) { return v >> 6; }
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constexpr uint8_t y(uint8_t v) { return (v >> 3) & 7; }
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constexpr uint8_t q(uint8_t v) { return (v >> 3) & 1; }
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constexpr uint8_t p(uint8_t v) { return (v >> 4) & 3; }
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constexpr uint8_t z(uint8_t v) { return v & 7; }
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Instruction::Condition condition_table[] = {
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Instruction::Condition::NZ, Instruction::Condition::Z,
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@ -279,7 +279,10 @@ void Video::output_row(int row, int start, int end) {
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line_control_ = ram_[0x19d00 + row];
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const int palette_base = (line_control_ & 15) * 32 + 0x19e00;
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for(int c = 0; c < 16; c++) {
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const int entry = ram_[palette_base + (c << 1)] | (ram_[palette_base + (c << 1) + 1] << 8);
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const auto entry = uint16_t(
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ram_[palette_base + (c << 1)] |
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(ram_[palette_base + (c << 1) + 1] << 8)
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);
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palette_[c] = convulve(entry);
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}
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@ -200,7 +200,7 @@ template<Model model> class ConcreteMachine:
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if(model <= Model::FortyEightK) {
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const size_t num_banks = std::min(size_t(48*1024), state->ram.size()) >> 14;
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for(size_t c = 0; c < num_banks; c++) {
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memcpy(&write_pointers_[c + 1][(c+1) * 0x4000], &state->ram[c * 0x4000], 0x4000);
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memcpy(&banks_[c + 1].write[(c+1) * 0x4000], &state->ram[c * 0x4000], 0x4000);
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}
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} else {
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memcpy(ram_.data(), state->ram.data(), std::min(ram_.size(), state->ram.size()));
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@ -309,7 +309,7 @@ template<Model model> class ConcreteMachine:
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// Model applied: the trigger for the ULA inserting a delay is the falling edge
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// of MREQ, which is always half a cycle into a read or write.
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if(
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is_contended_[address >> 14] &&
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banks_[address >> 14].is_contended &&
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cycle.operation >= PartialMachineCycle::ReadOpcodeStart &&
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cycle.operation <= PartialMachineCycle::WriteStart) {
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@ -363,7 +363,7 @@ template<Model model> class ConcreteMachine:
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case PartialMachineCycle::WriteStart: {
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// These all start by loading the address bus, then set MREQ
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// half a cycle later.
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if(is_contended_[address >> 14]) {
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if(banks_[address >> 14].is_contended) {
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const auto delay = video_.last_valid()->access_delay(video_.time_since_flush());
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advance(cycle.length + delay);
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@ -375,7 +375,7 @@ template<Model model> class ConcreteMachine:
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// Whatever's on the address bus will remain there, without IOREQ or
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// MREQ interceding, for this entire bus cycle. So apply contentions
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// all the way along.
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if(is_contended_[address >> 14]) {
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if(banks_[address >> 14].is_contended) {
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const auto half_cycles = cycle.length.as<int>();
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assert(!(half_cycles & 1));
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@ -405,7 +405,7 @@ template<Model model> class ConcreteMachine:
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// Fast loading: ROM version.
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//
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// The below patches over part of the 'LD-BYTES' routine from the 48kb ROM.
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if(use_fast_tape_hack_ && address == 0x056b && read_pointers_[0] == &rom_[classic_rom_offset()]) {
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if(use_fast_tape_hack_ && address == 0x056b && banks_[0].read == &rom_[classic_rom_offset()]) {
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// Stop pressing enter, if neccessry.
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if(duration_to_press_enter_ > Cycles(0)) {
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duration_to_press_enter_ = Cycles(0);
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@ -429,10 +429,10 @@ template<Model model> class ConcreteMachine:
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}
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}
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*cycle.value = read_pointers_[address >> 14][address];
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*cycle.value = banks_[address >> 14].read[address];
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if constexpr (model >= Model::Plus2a) {
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if(is_contended_[address >> 14]) {
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if(banks_[address >> 14].is_contended) {
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video_->set_last_contended_area_access(*cycle.value);
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}
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}
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@ -440,15 +440,15 @@ template<Model model> class ConcreteMachine:
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case PartialMachineCycle::Write:
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// Flush video if this access modifies screen contents.
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if(is_video_[address >> 14] && (address & 0x3fff) < 6912) {
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if(banks_[address >> 14].is_video && (address & 0x3fff) < 6912) {
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video_.flush();
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}
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write_pointers_[address >> 14][address] = *cycle.value;
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banks_[address >> 14].write[address] = *cycle.value;
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if constexpr (model >= Model::Plus2a) {
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// Fill the floating bus buffer if this write is within the contended area.
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if(is_contended_[address >> 14]) {
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if(banks_[address >> 14].is_contended) {
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video_->set_last_contended_area_access(*cycle.value);
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}
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}
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@ -758,11 +758,14 @@ template<Model model> class ConcreteMachine:
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std::array<uint8_t, 128*1024> ram_;
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std::array<uint8_t, 16*1024> scratch_;
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std::array<const uint8_t *, 4> read_pointers_;
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std::array<uint8_t *, 4> write_pointers_;
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std::array<uint8_t, 4> pages_;
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std::array<bool, 4> is_contended_;
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std::array<bool, 4> is_video_;
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struct Bank {
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const uint8_t * read;
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uint8_t *write;
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uint8_t page;
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bool is_contended;
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bool is_video;
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};
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std::array<Bank, 4> banks_;
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uint8_t port1ffd_ = 0;
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uint8_t port7ffd_ = 0;
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@ -821,19 +824,19 @@ template<Model model> class ConcreteMachine:
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disable_paging_ = port7ffd_ & 0x20;
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}
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void set_memory(int bank, uint8_t source) {
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void set_memory(std::size_t bank, uint8_t source) {
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if constexpr (model >= Model::Plus2a) {
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is_contended_[bank] = source >= 4 && source < 8;
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banks_[bank].is_contended = source >= 4 && source < 8;
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} else {
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is_contended_[bank] = source < 0x80 && source & 1;
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banks_[bank].is_contended = source < 0x80 && source & 1;
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}
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pages_[bank] = source;
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banks_[bank].page = source;
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uint8_t *const read = (source < 0x80) ? &ram_[source * 16384] : &rom_[(source & 0x7f) * 16384];
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const auto offset = bank*16384;
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read_pointers_[bank] = read - offset;
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write_pointers_[bank] = ((source < 0x80) ? read : scratch_.data()) - offset;
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banks_[bank].read = read - offset;
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banks_[bank].write = ((source < 0x80) ? read : scratch_.data()) - offset;
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}
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void set_video_address() {
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@ -843,10 +846,10 @@ template<Model model> class ConcreteMachine:
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void update_video_base() {
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const uint8_t video_page = (port7ffd_ & 0x08) ? 7 : 5;
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is_video_[0] = pages_[0] == video_page;
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is_video_[1] = pages_[1] == video_page;
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is_video_[2] = pages_[2] == video_page;
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is_video_[3] = pages_[3] == video_page;
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banks_[0].is_video = banks_[0].page == video_page;
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banks_[1].is_video = banks_[1].page == video_page;
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banks_[2].is_video = banks_[2].page == video_page;
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banks_[3].is_video = banks_[3].page == video_page;
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}
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// MARK: - Audio.
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@ -934,7 +937,7 @@ template<Model model> class ConcreteMachine:
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break;
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}
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write_pointers_[target >> 14][target] = *next;
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banks_[target >> 14].write[target] = *next;
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parity ^= *next;
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++target;
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}
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