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mirror of https://github.com/TomHarte/CLK.git synced 2024-12-23 20:29:42 +00:00

The ACIA now receives bits.

This commit is contained in:
Thomas Harte 2019-10-20 23:34:30 -04:00
parent 83d73fb088
commit 4134463094
3 changed files with 10 additions and 1 deletions

View File

@ -89,6 +89,7 @@ void ACIA::write(int address, uint8_t value) {
transmit.write(false);
break;
}
receive.set_read_delegate(this, Storage::Time(divider_ * 2, receive_clock_rate_.as_int()));
receive_interrupt_enabled_ = value & 0x80;
}
}
@ -174,3 +175,8 @@ ClockingHint::Preference ACIA::preferred_clocking() {
bool ACIA::get_interrupt_line() const {
return interrupt_request_;
}
bool ACIA::serial_line_did_produce_bit(Serial::Line *line, int bit) {
// TODO: how does this affect signalling?
return false;
}

View File

@ -17,7 +17,7 @@
namespace Motorola {
namespace ACIA {
class ACIA: public ClockingHint::Source {
class ACIA: public ClockingHint::Source, private Serial::Line::ReadDelegate {
public:
static constexpr const HalfCycles SameAsTransmit = HalfCycles(0);
@ -85,6 +85,8 @@ class ACIA: public ClockingHint::Source {
HalfCycles transmit_clock_rate_;
HalfCycles receive_clock_rate_;
bool serial_line_did_produce_bit(Serial::Line *line, int bit) final;
};
}

View File

@ -103,6 +103,7 @@ bool Line::read() {
void Line::set_read_delegate(ReadDelegate *delegate, Storage::Time bit_length) {
read_delegate_ = delegate;
read_delegate_bit_length_ = bit_length;
read_delegate_bit_length_.simplify();
write_cycles_since_delegate_call_ = 0;
}