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Corrects decoding of AND/OR x, Dn.

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Thomas Harte
2019-04-25 14:19:13 -04:00
parent ea463549c7
commit 4e25bcfcdc
1 changed files with 3 additions and 3 deletions
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6
Processors/68000/Implementation/68000Storage.cpp
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@@ -894,8 +894,8 @@ struct ProcessorStorageConstructor {
case l(PreDec): // [AND/OR/EOR].l Dn, -(An) case l(PreDec): // [AND/OR/EOR].l Dn, -(An)
op(int(Action::Decrement4) | MicroOp::DestinationMask, seq("n")); op(int(Action::Decrement4) | MicroOp::DestinationMask, seq("n"));
case l(Ind): // [AND/OR/EOR].l Dn, (An)+ case l(Ind): // [AND/OR/EOR].l Dn, (An)
case l(PostInc): // [AND/OR/EOR].l Dn, (An) case l(PostInc): // [AND/OR/EOR].l Dn, (An)+
op(int(Action::CopyToEffectiveAddress) | MicroOp::DestinationMask, seq("nRd+ nrd", { ea(1), ea(1) })); op(int(Action::CopyToEffectiveAddress) | MicroOp::DestinationMask, seq("nRd+ nrd", { ea(1), ea(1) }));
op(Action::PerformOperation, seq("np nw- nW", { ea(1), ea(1) })); op(Action::PerformOperation, seq("np nw- nW", { ea(1), ea(1) }));
if(mode == PostInc) { if(mode == PostInc) {
@@ -936,7 +936,7 @@ struct ProcessorStorageConstructor {
storage_.instructions[instruction].set_source(storage_, ea_mode, ea_register); storage_.instructions[instruction].set_source(storage_, ea_mode, ea_register);
storage_.instructions[instruction].set_destination(storage_, Dn, data_register); storage_.instructions[instruction].set_destination(storage_, Dn, data_register);
switch(mode) { switch(is_long_word_access ? l(mode) : bw(mode)) {
default: continue; default: continue;
case bw(Dn): // [AND/OR].bw Dn, Dn case bw(Dn): // [AND/OR].bw Dn, Dn