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Fully implement TAS.
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@ -188,7 +188,7 @@ struct TestProcessor: public CPU::MC68000Mk2::BusHandler {
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// @"rts.json",
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@"swap.json",
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@"tas.json",
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// @"tst.json",
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@"tst.json",
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]];
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// _testSet = [NSSet setWithArray:@[@"TAS 4ac0"]];
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}
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@ -1921,9 +1921,31 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
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// TAS
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//
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BeginState(TAS):
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// Populate all addresses.
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tas_cycles[0].address = tas_cycles[1].address =
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tas_cycles[2].address =
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tas_cycles[3].address = tas_cycles[4].address = &effective_address_[0].l;
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// TODO: use the specialised TAS bus cycle; five parts.
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// PerformBusOperation
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// Populate values to the relevant subset.
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tas_cycles[0].value = tas_cycles[1].value =
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tas_cycles[3].value = tas_cycles[4].value = &operand_[0].low;
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// First two parts: the read.
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PerformBusOperation(tas_cycles[0]);
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PerformBusOperation(tas_cycles[1]);
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// Third part: processing time.
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PerformBusOperation(tas_cycles[2]);
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// Do the actual TAS operation.
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status_.overflow_flag = status_.carry_flag = 0;
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status_.zero_result = operand_[0].b;
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status_.negative_flag = operand_[0].b & 0x80;
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// Final parts: write back.
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operand_[0].b |= 0x80;
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PerformBusOperation(tas_cycles[3]);
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PerformBusOperation(tas_cycles[4]);
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Prefetch();
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MoveToStateSpecific(Decode);
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@ -176,6 +176,15 @@ struct ProcessorBase: public InstructionSet::M68k::NullFlowController {
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Microcycle::Read | Microcycle::SameAddress | Microcycle::SelectWord | Microcycle::IsData
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};
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// TAS.
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Microcycle tas_cycles[5] = {
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{ Microcycle::Read | Microcycle::NewAddress | Microcycle::IsData },
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{ Microcycle::Read | Microcycle::SameAddress | Microcycle::IsData | Microcycle::SelectByte },
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{ Microcycle::SameAddress },
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{ Microcycle::SameAddress | Microcycle::IsData },
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{ Microcycle::SameAddress | Microcycle::IsData | Microcycle::SelectByte },
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};
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// Holding spot when awaiting DTACK/etc.
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Microcycle awaiting_dtack;
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};
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