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https://github.com/TomHarte/CLK.git
synced 2024-11-25 01:32:55 +00:00
Update logging.
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6497cae39d
commit
54aae60c92
@ -93,7 +93,7 @@ Analyser::Static::TargetList Analyser::Static::Commodore::GetTargets(const Media
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// make a first guess based on loading address
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switch(files.front().starting_address) {
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default:
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LOG("Unrecognised loading address for Commodore program: " << PADHEX(4) << files.front().starting_address);
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Log::Logger<Log::Source::CommodoreStaticAnalyser>().error().append("Unrecognised loading address for Commodore program: %04x", files.front().starting_address);
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[[fallthrough]];
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case 0x1001:
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memory_model = Target::MemoryModel::Unexpanded;
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@ -8,13 +8,11 @@
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#include "ncr5380.hpp"
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#ifndef NDEBUG
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#define NDEBUG
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#endif
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#define LOG_PREFIX "[5380] "
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#include "../../Outputs/Log.hpp"
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namespace {
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Log::Logger<Log::Source::NCR5380> logger;
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}
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// TODO:
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//
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// end_of_dma_ should be set if: /EOP && /DACK && (/RD || /WR); for at least 100ns.
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@ -38,7 +36,7 @@ NCR5380::NCR5380(SCSI::Bus &bus, int clock_rate) :
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void NCR5380::write(int address, uint8_t value, bool) {
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switch(address & 7) {
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case 0:
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LOG("[0] Set current SCSI bus state to " << PADHEX(2) << int(value));
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logger.info().append("[0] Set current SCSI bus state to %02x", value);
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data_bus_ = value;
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if(dma_request_ && dma_operation_ == DMAOperation::Send) {
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@ -47,7 +45,7 @@ void NCR5380::write(int address, uint8_t value, bool) {
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break;
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case 1: {
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LOG("[1] Initiator command register set: " << PADHEX(2) << int(value));
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logger.info().append("[1] Initiator command register set: %02x", value);
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initiator_command_ = value;
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bus_output_ &= ~(Line::Reset | Line::Acknowledge | Line::Busy | Line::SelectTarget | Line::Attention);
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@ -63,7 +61,7 @@ void NCR5380::write(int address, uint8_t value, bool) {
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} break;
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case 2:
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LOG("[2] Set mode: " << PADHEX(2) << int(value));
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logger.info().append("[2] Set mode: %02x", value);
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mode_ = value;
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// bit 7: 1 = use block mode DMA mode (if DMA mode is also enabled)
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@ -104,27 +102,27 @@ void NCR5380::write(int address, uint8_t value, bool) {
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break;
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case 3: {
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LOG("[3] Set target command: " << PADHEX(2) << int(value));
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logger.info().append("[3] Set target command: %02x", value);
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target_command_ = value;
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update_control_output();
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} break;
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case 4:
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LOG("[4] Set select enabled: " << PADHEX(2) << int(value));
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logger.info().append("[4] Set select enabled: %02x", value);
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break;
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case 5:
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LOG("[5] Start DMA send: " << PADHEX(2) << int(value));
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logger.info().append("[5] Start DMA send: %02x", value);
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dma_operation_ = DMAOperation::Send;
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break;
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case 6:
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LOG("[6] Start DMA target receive: " << PADHEX(2) << int(value));
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logger.info().append("[6] Start DMA target receive: %02x", value);
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dma_operation_ = DMAOperation::TargetReceive;
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break;
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case 7:
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LOG("[7] Start DMA initiator receive: " << PADHEX(2) << int(value));
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logger.info().append("[7] Start DMA initiator receive: %02x", value);
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dma_operation_ = DMAOperation::InitiatorReceive;
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break;
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}
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@ -148,7 +146,7 @@ void NCR5380::write(int address, uint8_t value, bool) {
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uint8_t NCR5380::read(int address, bool) {
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switch(address & 7) {
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case 0:
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LOG("[0] Get current SCSI bus state: " << PADHEX(2) << (bus_.get_state() & 0xff));
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logger.info().append("[0] Get current SCSI bus state: %02x", (bus_.get_state() & 0xff));
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if(dma_request_ && dma_operation_ == DMAOperation::InitiatorReceive) {
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return dma_acknowledge();
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@ -156,7 +154,7 @@ uint8_t NCR5380::read(int address, bool) {
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return uint8_t(bus_.get_state());
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case 1:
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LOG("[1] Initiator command register get: " << (arbitration_in_progress_ ? 'p' : '-') << (lost_arbitration_ ? 'l' : '-'));
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logger.info().append("[1] Initiator command register get: %c%c", arbitration_in_progress_ ? 'p' : '-', lost_arbitration_ ? 'l' : '-');
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return
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// Bits repeated as they were set.
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(initiator_command_ & ~0x60) |
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@ -168,11 +166,11 @@ uint8_t NCR5380::read(int address, bool) {
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(lost_arbitration_ ? 0x20 : 0x00);
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case 2:
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LOG("[2] Get mode");
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logger.info().append("[2] Get mode");
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return mode_;
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case 3:
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LOG("[3] Get target command");
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logger.info().append("[3] Get target command");
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return target_command_;
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case 4: {
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@ -186,7 +184,7 @@ uint8_t NCR5380::read(int address, bool) {
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((bus_state & Line::Input) ? 0x04 : 0x00) |
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((bus_state & Line::SelectTarget) ? 0x02 : 0x00) |
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((bus_state & Line::Parity) ? 0x01 : 0x00);
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LOG("[4] Get current bus state: " << PADHEX(2) << int(result));
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logger.info().append("[4] Get current bus state: %02x", result);
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return result;
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}
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@ -201,16 +199,16 @@ uint8_t NCR5380::read(int address, bool) {
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/* b2 = busy error */
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((bus_state & Line::Attention) ? 0x02 : 0x00) |
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((bus_state & Line::Acknowledge) ? 0x01 : 0x00);
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LOG("[5] Get bus and status: " << PADHEX(2) << int(result));
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logger.info().append("[5] Get bus and status: %02x", result);
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return result;
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}
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case 6:
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LOG("[6] Get input data");
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logger.info().append("[6] Get input data");
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return 0xff;
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case 7:
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LOG("[7] Reset parity/interrupt");
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logger.info().append("[7] Reset parity/interrupt");
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irq_ = false;
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return 0xff;
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}
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